FIN1022 Datasheet, PDF (4/10 Pages) Fairchild Semiconductor – 2 X 2 LVDS High Speed Crosspoint Switch

AC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Symbol
Parameter
Test Conditions
Min
Typ
Max
(Note 4)
Units
t_PLHD
t_PHLD
Differential Output Propagation Delay
LOW-to-HIGH
Differential Output Propagation Delay
HIGH-to-LOW
R_L = 75 Ω, C_L = 5 pF,
V_CC = 3.3V, T_A = 25°C
See Figure 4 and Figure 5
0.7
1.6
ns
1.0
1.2
1.3
0.7
1.6
ns
1.0
1.2
1.3
t_TLHD
t_THLD
t_PLH
t_PHL
t_ZHD
Differential Output Rise Time (20% to 80%)
Differential Output Fall Time (80% to 20%)
Selection Propagation Delay
LOW-to-HIGH (SEL_n to OUT_n)
Selection Propagation Delay
HIGH-to-LOW (SEL_n to OUT_n)
Differential Output Enable Time
R_L = 75 Ω, C_L = 5 pF,
V_CC = 3.3V, T_A = 25°C
See Figure 6 and Figure 7
from Z-to-HIGH
290
580
ps
290
580
ps
0.6
1.5
ns
0.9
1.1
1.2
0.6
1.5
ns
0.9
1.1
1.2
3.5
ns
t_ZLD
Differential Output Enable Time
from Z-to-LOW
t_HZD
Differential Output Disable Time
from HIGH-to-Z
R_L = 75Ω, C_L = 5 pF
See Figure 8 and Figure 9
3.5
ns
3.5
ns
t_LZD
Differential Output Disable Time
from LOW-to-Z
3.5
ns
t_SET
t_HOLD
t_JIT
Input (IN_n+/IN_n−) Setup Time to SEL_n
Input (IN_n+/IN_n−) Hold Time to SEL_n
Output Peak-to-Peak Jitter
See Figure 10
See Figure 10
2²³ −1 PRBS Sequence at 800 Mbps
50% Duty Cycle at 800 Mbps
0.5
0.3
ns
0.5
0.3
ns
190
ps
20
35
ps
f_TOG
t_SKEW
Maximum Toggle Frequency
Within Device Channel-to-Channel Skew
Pulse Skew |t_PLHD -t_PHLD|
Part-to-Part Skew (Note 5)
R_L = 75 Ω, C_L = 5 pF, See Figure 4
800
900
Mbps
35
80
ps
0
225
ps
100
500
ps
Note 4: All typical values are at T_A = 25°C and with V_CC = 3.3V.
Note 5: Part-to-part skew is the maximum delay time difference on like edges (LOW-to-HIGH or HIGH-to-LOW) for the same V_CC and temperature condi-
tions.
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