FIN1022 Datasheet, PDF (2/10 Pages) Fairchild Semiconductor – 2 X 2 LVDS High Speed Crosspoint Switch

Connection Diagram
Pin Descriptions
Pin Name
Description
R_IN0+, R_IN1+
LVDS non-inverting data inputs
R_IN0−, R_IN1−
LVDS inverting data inputs
D_OUT0+, D_OUT1+ LVDS non-inverting data outputs
D_OUT0−, D_OUT1− LVDS inverting data outputs
EN₀
LVTTL input for enabling D_OUT0+/D_OUT0−
EN₁
LVTTL input for enabling D_OUT1+/D_OUT1−
SEL₀
LVTTL input for selecting R_IN0+/R_IN0− or
R_IN1+/R_IN1− for output D_OUT0+/D_OUT0−
SEL₁
LVTTL input for selecting R_IN0+/R_IN0− or
R_IN1+/R_IN1− for output D_OUT1+/D_OUT1−
V_CC
Power Supply
GND
Ground
Function Table
SEL₀
L/O
L/O
H
H
X
X
L/O
H
X
O = OPEN
Inputs
SEL₁ EN₀
L/O
H
H
H
L/O
H
H
H
L/O L/O
H
L/O
X
H
X
H
X
L/O
L / O = LOW or OPEN
EN₁
Outputs
D_OUT0+ D_OUT0− D_OUT1+ D_OUT1−
Mode
H
R_IN0+ R_IN0− R_IN0+ R_IN0− 1:2 Splitter
H
R_IN0+ R_IN0− R_IN1+ R_IN1− Repeater
H
R_IN1+ R_IN1− R_IN0+ R_IN0− Switch
H
R_IN1+ R_IN1− R_IN1+ R_IN1− 1:2 Splitter
H
Z
Z
R_IN0+ R_IN0− D_OUT0 Disabled
H
Z
Z
R_IN1+ R_IN1− D_OUT0 Disabled
L / O R_IN0+ R_IN0−
Z
Z
L / O R_IN1+ R_IN1−
Z
Z
L/O
Z
Z
Z
Z
H = HIGH Logic Level
L = LOW Logic Level
D_OUT1 Disabled
D_OUT1 Disabled
D_OUT0 and D_OUT1 Disabled
X = Don’t Care
Z = High Impedance
Function Diagrams
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