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7004 Datasheet, PDF (4/12 Pages) Bourns Electronic Solutions – Network Interface Device
VIN
+
C1
U1
PWM
Gate
GND
D1
T1
Q1
MOSFET N
L1
D2
VOUT
+
C2
RTN
Figure 3. A single transistor forward converter.
Figure 4 shows a design for a typical RCD clamp circuit. The leakage inductance energy is
stored in the capacitor, and subsequently burned up in the resistor. The flyback voltage during
the primary switch's off state is not forced by the turns ratio as in the flyback design. During the
off state the forward output rectifier (D1) essentially disconnects the transformer from the
secondary circuit. The resonant effects of the transformer’s primary inductance, and the stray
capacitance at the switch’s drain node control the primary switch drain voltage. This capaci-
tance includes the FET’s output capacitance and Miller capacitance, as well as transformer
winding capacitances, and reflected secondary rectifier capacitances. Again, the severe
nonlinearity of many of these elements leads one to a largely empirical approach to circuit
optimization. In general, it is safe to assume that the maximum drain-voltage observed in the
off state will be 2.5- to 3-times the input voltage. Therefore, the 200-V FDS2670 is the best
choice for these designs. Figure 5 shows the important current and voltage waveforms.
To FET Drain
D1
R1
C1
To Ground of VIN
Figure 4. A typical RCD clamp circuit.
©2001 Fairchild Semiconductor Corporation
4
Rev. A, June 2001