FAN7389_13 Datasheet, PDF (3/17 Pages) Fairchild Semiconductor – 3-Phase Half-Bridge Gate-Drive IC

Pin Configuration
Figure 3. Pin Configuration
Pin Definitions
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17, 21, 25
18
19
20
22
23
24
26
27
28
Name
V_DD
HIN1
HIN2
HIN3
LIN1
LIN2
LIN3
FO
CS
EN
RCIN
V_SS
COM
LO3
LO2
LO1
NC
V_S3
HO3
V_B3
V_S2
HO2
V_B2
V_S1
HO1
V_B1
Description
Logic and low-side gate driver power supply voltage
Logic Input 1 for high-side gate 1 driver
Logic Input 2 for high-side gate 2 driver
Logic Input 3 for high-side gate 3 driver
Logic Input 1 for low-side gate 1 driver
Logic Input 2 for low-side gate 2 driver
Logic Input 3 for low-side gate 3 driver
Fault output with open drain (indicates over-current and low-side under-voltage)
Analog input for over-current shutdown
Logic input for shutdown functionality
An external RC network input used to define the fault-clear delay
Logic ground
Low-side driver return
Low-side gate driver 3 output
Low-side gate driver 2 output
Low-side gate driver 1 output
No connect
High-side driver 3 floating supply offset voltage
High-side driver 3 gate driver output
High-side driver 3 floating supply
High-side driver 2 floating supply offset voltage
High-side driver 2 gate driver output
High-side driver 2 floating supply
High-side driver 1 floating supply offset voltage
High-side driver 1 gate driver output
High-side driver 1 floating supply
© 2010 Fairchild Semiconductor Corporation
FAN7389 • Rev. 1.0.3
3
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