FAN103_10 Datasheet, PDF (3/16 Pages) Fairchild Semiconductor – Primary-Side-Regulation PWM Controller (PWM-PSR)

Marking Information
Pin Configuration
F: Fairchild Logo
Z: Plant Code
X: 1-Digit Year Code
Y: 1-Digit Week Code
TT: 2-Digit Die Run Code
T: Package Type (M=SOP)
P: Y=Green Package
M: Manufacture Flow Code
Figure 4. Top Mark
Figure 5. Pin Configuration
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
Name
CS
GATE
VDD
COMR
VS
GND
NC
HV
Description
Current Sense. This pin connects a current sense resistor, to detect the MOSFET current for
peak-current-mode control in CV mode, and provides the output-current regulation in CC mode.
PWM Signal Output. This pin uses the internal totem-pole output driver to drive the power
MOSFET. It is internally clamped below 15V.
Power Supply. IC operating current and MOSFET driving current are supplied using this pin.
This pin is connected to an external VDD capacitor of typically 10µF. The threshold voltages for
startup and turn-off are 16V and 5V, respectively. The operating current is lower than 5mA.
Cable Compensation. This pin connects a capacitance between the COMR and GND pins for
compensation voltage drop due to output cable loss in CV mode.
Voltage Sense. This pin detects the output voltage information and discharge time based on
voltage of auxiliary winding.
Ground
No Connect
High Voltage. This pin connects to bulk capacitor for high-voltage startup.
© 2010 Fairchild Semiconductor Corporation
FAN103 • Rev. 1.0.3
3
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