FAN100_09 Datasheet, PDF (3/16 Pages) Fairchild Semiconductor – Primary-Side-Control PWM Controller

Marking Information
ZXYTT
FAN100
TPM
F- Fairchild logo
Z- Plant Code
X- 1-Digit Year Code
Y- 1-Digit Week Code
TT: 2-Digit Die Run Code
T: Package Type (M=SOP)
P: Z: Pb free, Y: Green Package
M: Manufacture Flow Code
Pin Configuration
Figure 4. Top Mark
CS
GND
COMI
COMV
GATE
VDD
GND
VS
Figure 5. Pin Configuration
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
Name
CS
GND
COMI
COMV
VS
GND
VDD
GATE
Description
Current Sense. This pin connects a current-sense resistor to sense the MOSFET current for
peak-current-mode control in CV mode and provides for output-current regulation in CC mode.
Ground.
Constant Current Loop Compensation. this pin connects a capacitor and a resistor between
COMI and GND for compensation current loop gain.
Constant Voltage Loop Compensation. this pin connects a capacitor and a resistor between
COMV and GND for compensation voltage loop gain.
Voltage Sense. This pin detects the output voltage information and discharge time based on
voltage of auxiliary winding. This pin connects two divider resistors and one capacitor.
Ground.
Supply. The power supply pin. IC operating current and MOSFET driving current are supplied
using this pin. This pin is connected to an external VDD capacitor of typically 10µF. The
threshold voltages for startup and turn-off are 16V and 5V, respectively. The operating current
is lower than 5mA.
PWM Signal Output. This pin outputs PWM signal and includes the internal totem-pole output
driver to drive the external power MOSFET. The clamped gate output voltage is 18V.
© 2009 Fairchild Semiconductor Corporation
FAN100 Rev. 1.0.2
3
www.fairchildsemi.com