AN-6208 Datasheet, PDF (3/10 Pages) Fairchild Semiconductor – Secondary-Side Synchronous Rectifier (SR) for LLC Resonant Converter

AN-6208
Application Circuit
Figure 6 shows the typical application circuit of FAN6208
and Figure 7 shows the typical timing diagram of SR gate
drive signal. FAN6208 senses the drain-to-source voltage of
each SR to determine the gate drive timing. Once the body
diode of SR begins conducting, the drain-to-source voltage
drops to zero, which causes low detection (DETL) pin
voltage to drop to zero. FAN6208 turns on the MOSFET
after t_ON-ON-DETL (about 350ns), when the voltage on DETL
drops below 2V. As depicted in Figure 8, the turn -on delay
(after t_SR-ON-DETL) is a sum of debounce time (150ns) and
propagation delay (200ns).
FAN6208 measures the SR conduction duration (t_DETL),
during which DETL voltage stays lower than 2V, and uses
this information to determine the turn-off instant of SR
gates of the next switching cycle, as shown in Figure 7. The
turn-off instant is obtained by subtracting a dead time
(t_DEAD) from the measured SR conduction duration of the
previous switching cycle.
DETL1
2V
350ns
t_SR-ON-DETL
V_DETL1
t_DB t_PD
GATE1 _{150ns 200ns}
APPLICATION NOTE
DETL1
2V
V_DETL1
GATE1
350ns
t_SR-ON-DETL
t_DB t_PD
150ns 200ns
DETL1
GATE1
350ns
t_SR-ON-DETL
V_DETL1
2V
t_DB t_PD
150ns 200ns
Figure 6. Application Circuit of FAN6208
Figure 7. SR Conduction Time Determination
Figure 8. Timing Diagram for Turning On SR
DETL Pin Configuration
Allowable voltage on the DETL pin is from -0.3V to 7V.
Since the maximum voltage of the SR drain-to-source
voltage is twice that of the output voltage, a diode (D_DETL) is
required for the DETL pin to prevent high voltage. Diode
1N4148 is typically used for D_DETL. Since the DETL
internal current source is 50µA, R_DETL should be determined
such that the DETL voltage is lower than the low detection
threshold (2V) with enough margin when the SR conducts.
Since the forward-voltage drop of SR can be as low as zero
when SR current is small, the DETL resistor should be:
R_DETL ⋅
<
(2 −V_FD
50µ A
)
(1)
where V_FD is the forward-voltage drop of DETL diode.
R_DETL larger than 20kΩ is not typically recommended for
proper low-voltage detection on DETL pin.
R_DETL should be determined such that the DETL voltage is
higher than -0.3V when the maximum voltage drop occurs
across SR, such as:
© 2010 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 3/10/11
3
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