FAN7318B Datasheet, PDF (20/24 Pages) Fairchild Semiconductor – LCD Backlight Inverter Drive IC

Figure 56. OLP in Normal Mode
In
burst
dimming
mode,
if
V min
OLP
is
less
than
0.5V
for
another time predetermined by the TIMER pin capacitor
and an internal current source, 2µA; the IC is shut down,
as shown in Figure 57. The open-lamp protection delay
in burst dimming mode is shorter than in full brightness
because a short-lamp condition is detected at rising
interval of lamp voltage in burst dimming, then another
internal current source is turned on during the interval.
Figure 58. OLP Disable in DCR Mode
Short-Lamp Protection
If
the
minimum
of
the
rectified
OLR
voltages
(
Vmin
OLR
)
is
less than 0.3V for a time predetermined by the TIMER
pin capacitor and a internal current source of 50µA in
normal mode, the IC is shut down, as shown in Figure
59. This protection is disabled in striking mode to ignite
lamps reliably.
Figure 57. OLP in Burst Dimming Mode
Applying voltage lower than 2.1V to the ENA pin enables
OLP. Applying voltage higher than 2.5V to the ENA pin
disables OLP and is called as DCR mode. Regardless of
DCR mode, OLP is enabled in striking mode.
Figure 59. Short-Lamp Protection in Normal Mode
In
burst
dimming
mode,
if
V min
OLR
is
less
than
0.3V
for
a
time predetermined by the TIMER pin capacitor and a
internal current source of 50µA turned on only burst
dimming on time, the IC is shut down, as shown in
Figure 60. SLP protection delay changes, depending on
burst dimming on duty ratio.
© 2009 Fairchild Semiconductor Corporation
FAN7318B • 1.0.0
20
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