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J111-D74Z Datasheet, PDF (2/6 Pages) Fairchild Semiconductor – This device is designed for low level analog switching, sample and hold circuits and chopper stabilized amplifiers
Electrical Characteristics Ta = 25°C unless otherwise noted
Symbol
Parameter
Test Condition
Off Characteristics
BV(BR)GSS Gate-Source Breakdown Voltage IG = -1.0A, VDS = 0
IGSS Gate Reverse Current
VGS = -15V, VDS = 0
VGS(off) Gate-Source Cutoff Voltage
VDS = 5.0V, ID = 1.0A
111
112
MMBFJ112_SB51338
113
ID(off) Drain Cutoff Leakage Current
On Characteristics
VDS = 5.0V, VGS = -10V
IDSS Zero-Gate Voltage Drain
VDS = 15V, IGS = 0
111
Current*
112
113
rDS(on) Drain-Source On Resistance
VDS  0.1V, VGS = 0
111
112
113
Small Signal Characteristics
Cdg(on) Drain Gate & Source Gate On
Csg(on) Capacitance
VDS = 0, VGS = 0, f = 1.0MHz
Cdg(off) Drain-Gate Off Capacitance
VDS = 0, VGS = -10V, f = 1.0MHz
Csg(off) Source-Gate Off Capacitance VDS = 0, VGS = -10V, f = 1.0MHz
* Pulse Test: Pulse Width  300s, Duty Cycle  3.0%
Min.
-35
-3.0
-1.0
-3.0
-0.5
20
5.0
2.0
Typ.
Max. Units
V
-1.0 nA
-10
V
-5.0
V
-5.0
V
-3.0
V
1.0
nA
mA
mA
mA
30

50

100

28
pF
5.0
pF
5.0
pF
Typical Performance Characteristics
Common Drain-Source
10
V GS = 0 V
8
- 0.2 V
TA = 25°C
TYP V GS(off) = - 2.0 V
- 0.4 V
6
- 0.6 V
4
- 0.8 V
- 1.0 V
2
- 1.4 V
- 1.2 V
0
0
0.4
0.8
1.2
1.6
2
VDS - DRAIN-SOURCE VOLTAGE (V)
Parameter Interactions
100
100
r DS
50
50
20
g fs
20
10
_50.5
I DSS
I DSS , g fs @ VDS = 15V,
V GS = 0 PULSED
r DS @ 1.0 mA, VGS = 0
V GS(off) @ V DS = 15V,
I D = 1.0 nA
_1
_2
_5
VGS (OFF) - GATE CUTOFF VOLTAGE (V)
10
_
5
10
© 2012 Fairchild Semiconductor Corporation
J111 / J112 / J113 / MMBFJ111 / MMBFJ112 / MMBFJ112_SB51338 / MMBFJ113
Rev. B0
2
www.fairchildsemi.com