GTLP6C816A Datasheet, PDF (2/7 Pages) Fairchild Semiconductor – LVTTL-to-GTLP Clock Driver

Functional Description
The GTLP6C816A is a clock driver providing LVTTL-to-GTLP clock translation, and GTLP-to-LVTTL clock translation in the
same package. The LVTTL-to-GTLP direction is a 1:2 clock driver path with a single Enable pin (OEB). For the GTLP-to-
LVTTL direction the clock receiver path is a 1:6 buffer with a single Enable control (OEA). Data polarity is inverting for both
directions.
Truth Tables
Logic Diagram
Inputs
TTLIN
OEB
H
L
L
L
X
H
Inputs
GTLPIN
OEA
H
L
L
L
X
H
Outputs
OBn
L
H
High Z
Outputs
OAn
L
H
High Z
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