FDMS86500L Datasheet, PDF (2/7 Pages) Fairchild Semiconductor – N-Channel PowerTrench® MOSFET 60 V, 80 A, 2.5 mΩ

Electrical Characteristics T_J = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BV_DSS
ΔBV_DSS
ΔT_J
I_DSS
I_GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I_D = 250 μA, V_GS = 0 V
60
V
I_D = 250 μA, referenced to 25 °C
30
mV/°C
V_DS = 48 V, V_GS = 0 V
V_GS = ±20 V, V_DS = 0 V
1
μA
±100 nA
On Characteristics
V_GS(th)
Gate to Source Threshold Voltage
V_GS = V_DS, I_D = 250 μA
1
ΔV_GS(th)
ΔT_J
Gate to Source Threshold Voltage
Temperature Coefficient
I_D = 250 μA, referenced to 25 °C
V_GS = 10 V, I_D = 25 A
r_DS(on)
Static Drain to Source On Resistance
V_GS = 4.5 V, I_D = 20 A
V_GS = 10 V, I_D = 25 A, T_J = 125 °C
g_FS
Forward Transconductance
V_DS = 5 V, I_D = 20 A
1.8
3
V
-7
mV/°C
2.1
2.5
2.9
3.7
mΩ
3.1
3.7
95
S
Dynamic Characteristics
C_iss
C_oss
C_rss
R_g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V_DS = 30 V, V_GS = 0 V,
f = 1 MHz
9420 12530 pF
1470 1955 pF
50
80
pF
1.1
Ω
Switching Characteristics
t_d(on)
t_r
t_d(off)
t_f
Q_g
Q_g
Q_gs
Q_gd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
V_DD = 30 V, I_D = 25 A,
V_GS = 10 V, R_GEN = 6 Ω
V_GS = 0 V to 10 V
V_GS = 0 V to 4.5 V _{VDD = 30 V,}
I_D = 25 A
27
43
ns
16
28
ns
63
100
ns
7.8
16
ns
117
165
nC
54
108
nC
26.6
nC
11.5
nC
Drain-Source Diode Characteristics
V_SD
Source to Drain Diode Forward Voltage
V_GS = 0 V, I_S = 2.1 A
V_GS = 0 V, I_S = 25 A
(Note 2)
(Note 2)
0.68
1.2
V
0.79
1.3
t_rr
Reverse Recovery Time
Q_rr
Reverse Recovery Charge
I_F = 25 A, di/dt = 100 A/μs
54
87
ns
42
67
nC
t_rr
Reverse Recovery Time
Q_rr
Reverse Recovery Charge
I_F = 25 A, di/dt = 300 A/μs
46
73
ns
84
134
nC
Notes:
1. R_θJA is determined with the device mounted on a 1 in² pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R_θJC is guaranteed by design while R_θCA is determined by
the user's board design.
a) 50 °C/W when mounted on a
1 in² pad of 2 oz copper
b) 125 °C/W when mounted on a
minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. E_AS of tbd mJ is based on starting T_J = 25 °C, L = 0.3 mH, I_AS = 40 A, V_DD = 54 V, V_GS = 10 V.
4. Package-limited current of 80 A is based on ideal infinite heatsink condition.
©2011 Fairchild Semiconductor Corporation
2
FDMS86500L Rev.C1
www.fairchildsemi.com