FDD6696 Datasheet, PDF (2/5 Pages) Fairchild Semiconductor – 30V N-Channel PowerTrench MOSFET

Electrical Characteristics
Symbol
Parameter
T_A = 25°C unless otherwise noted
Test Conditions
Min Typ Max Unit
s
Drain-Source Avalanche Ratings (Note 2)
EAS
Drain-Source Avalanche Energy Single Pulse, VDD = 15 V, ID=13A
165 mJ
IAS
Drain-Source Avalanche Current
13
A
Off Characteristics
BV DSS
Drain–Source Breakdown
Voltage
∆BV DSS
∆TJ
IDSS
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
VGS = 0 V,
ID = 250 µA
ID = 250 µA, Referenced to 25°C
VDS = 24 V, VGS = 0 V
30
23
V
mV/°C
10
µA
IGSSF
Gate–Body Leakage
VGS =± 16 V, VDS = 0 V
± 100 nA
On Characteristics (Note 2)
V GS(th)
Gate Threshold Voltage
∆V GS(th)
∆TJ
Gate Threshold Voltage
Temperature Coefficient
RDS(on)
Static Drain–Source
On–Resistance
gFS
Forward Transconductance
VDS = VGS,
ID = 250 µA
ID = 250 µA, Referenced to 25°C
VGS = 10 V, ID = 13 A
VGS = 4.5 V, ID = 12 A
VGS = 10 V, ID = 13 A, TJ=125°C
VDS = 5 V,
ID = 13 A
1
2
–5
3
V
mV/°C
6.7 8.0 mΩ
8.6 10.7
10.2 15.0
51
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
VDS = 15 V,
f = 1.0 MHz
V GS = 0 V,
1715
pF
410
pF
Crss
Reverse Transfer Capacitance
180
pF
RG
Gate Resistance
VGS = 15 mV, f = 1.0 MHz
1.3
Ω
Switching Characteristics (Note 2)
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
VDD = 15 V,
VGS = 10 V,
ID = 13 A,
RGEN = 6 Ω
13 23
ns
4
9
ns
td(off)
Turn–Off Delay Time
27 43
ns
tf
Turn–Off Fall Time
Qg
Total Gate Charge
Qgs
Gate–Source Charge
VDS = 15V,
VGS = 5 V
ID = 13 A,
17 31
ns
17
24
nC
5
nC
Qgd
Gate–Drain Charge
6
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
V SD
Drain–Source Diode Forward
Voltage
VGS = 0 V, IS = 13 A (Note 2)
trr
Diode Reverse Recovery Time IF = 13 A,
Qrr
Diode Reverse Recovery Charge ^{diF/dt = 100 A/µs}
13
A
0.8 1.2
V
27
nS
15
nC
Notes:
1. R_θJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R_θJC is guaranteed by design while R_{θ CA} is determined by the user's board design.
a) R_θJA = 40°C/W when mounted on
a 1in² pad of 2 oz copper
b) R_θJA = 96°C/W when mounted
on a minimum pad.
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
Scale 1 : 1 on letter size paper
3. Maximum current is calculated as:
current limitation is 21A
P_D
R _DS(ON)
where PD is maximum power dissipation at TC = 25°C and RDS(on) is at TJ(max) and VG S = 10V. Package
FDD6696/FDU6696 Rev. D (W)