74LCX74_08 Datasheet, PDF (2/13 Pages) Fairchild Semiconductor – 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs

Connection Diagrams
Pin Assignments for SOIC, SOP, and TSSOP
Logic Symbols
Pad Assignment for DQFN
IEEE/IEC
(Top View)
Pin Description
Pin Names
D₁, D₂
CP₁, CP₂
C_D1, C_D2
S_D1, S_D2
Q₁, Q₁, Q₂, Q₂
Description
Data Inputs
Clock Pulse Inputs
Direct Clear Inputs
Direct Set Inputs
Outputs
Truth Table
(Each Half)
Inputs
Outputs
S_D
C_D
CP
D
Q
Q
L
H
X
X
H
L
H
L
X
X
L
H
L
L
X
X
H
H
H
H
H
H
L
H
H
L
L
H
H
H
L
X
Q₀
Q₀
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Clock Transition
Q₀(Q₀) = Previous Q(Q) before LOW-to-HIGH Transition
of Clock
©1995 Fairchild Semiconductor Corporation
74LCX74 Rev. 1.7.0
2
www.fairchildsemi.com