74LCX16841 Datasheet, PDF (2/8 Pages) Fairchild Semiconductor – Low Voltage 20-Bit Transparent Latch with 5V Tolerant Inputs and Outputs

Connection Diagram
Truth Tables
Functional Description
The LCX16841 contains twenty D-type latches with
3-STATE standard outputs. The device is byte controlled
with each byte functioning identically, but independent of
the other. Control pins can be shorted together to obtain full
20-bit operation. The following description applies to each
byte. When the Latch Enable (LE_n) input is HIGH, data on
the D_n enters the latches. In this condition the latches are
transparent, i.e. a latch output will change states each time
Logic Diagrams
Inputs
Outputs
LE₁
OE₁
D₀–D₉
O₀–O₉
X
H
X
Z
H
L
L
L
H
L
H
H
L
L
X
O₀
Inputs
Outputs
LE₂
OE₂
D₁₀–D₁₉ O₁₀–O₁₉
X
H
X
Z
H
L
L
L
H
L
H
H
L
L
X
O₀
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
O₀ = Previous O₀ before HIGH-to-LOW transition of Latch Enable
its D input changes. When LE_n is LOW, the latches store
information that was present on the D inputs a setup time
preceding the HIGH-to-LOW transition of LE_n. The
3-STATE standard outputs are controlled by the Output
Enable (OE_n) input. When OE_n is LOW, the standard out-
puts are in the 2-state mode. When OE_n is HIGH, the stan-
dard outputs are in the high impedance mode but this does
not interfere with entering new data into the latches.
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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