FAN3223 Datasheet, PDF (19/24 Pages) Fairchild Semiconductor – Dual 4A High-Speed, Low-Side Gate Drivers

Thermal Guidelines
Gate drivers used to switch MOSFETs and IGBTs at
high frequencies can dissipate significant amounts of
power. It is important to determine the driver power
dissipation and the resulting junction temperature in the
application to ensure that the part is operating within
acceptable temperature limits.
The total power dissipation in a gate driver is the sum of
two components, PGATE and PDYNAMIC:
PTOTAL = PGATE + PDYNAMIC
(1)
Gate Driving Loss: The most significant power loss
results from supplying gate current (charge per unit
time) to switch the load MOSFET ON and OFF at
the switching frequency. The power dissipation that
results from driving a MOSFET at a specified gate-
source voltage, VGS, with gate charge, QG, at
switching frequency, FSW, is determined by:
PGATE = QG • VGS • FSW • n
(2)
n is the number of driver channels in use (1 or 2).
Dynamic Pre-drive / Shoot-through Current: A
power loss resulting from internal current
consumption under dynamic operating conditions,
including pin pull-up / pull-down resistors, can be
obtained using the “IDD (No-Load) vs. Frequency”
graphs in Typical Performance Characteristics to
determine the current IDYNAMIC drawn from VDD
under actual operating conditions:
PDYNAMIC = IDYNAMIC • VDD • n
(3)
Once the power dissipated in the driver is determined,
the driver junction rise with respect to circuit board can
be evaluated using the following thermal equation,
assuming ψJB was determined for a similar thermal
design (heat sinking and air flow):
TJ = PTOTAL • ψJB + TB
(4)
where:
TJ = driver junction temperature
ψ_JB = (psi) thermal characterization parameter relating
temperature rise to total power dissipation
TB = board temperature in location as defined in
the Thermal Characteristics table.
To give a numerical example, if the synchronous
rectifier switches in the forward converter of Figure 52
are FDMS8660S, the datasheet gives a total gate
charge of 60nC at VGS = 7V, so two devices in parallel
would have 120nC gate charge. At a switching
frequency of 300kHz, the total power dissipation is:
PGATE = 120nC • 7V • 300kHz • 2 = 0.5W
(5)
PDYNAMIC = 1.5mA • 7V • 2 = 0.021W
(6)
PTOTAL = 0.52W
(7)
The SOIC-8 has a junction-to-board thermal
characterization parameter of ψJB = 42°C/W. In a
system application, the localized temperature around
the device is a function of the layout and construction of
the PCB along with airflow across the surfaces. To
ensure reliable operation, the maximum junction
temperature of the device must be prevented from
exceeding the maximum rating of 150°C; with 80%
derating, TJ would be limited to 120°C. Rearranging
Equation 4 determines the board temperature required
to maintain the junction temperature below 120°C:
TB,MAX = TJ - PTOTAL • ψJB
(8)
TB,MAX = 120°C – 0.52W • 42°C/W = 98°C
(9)
For comparison, replace the SOIC-8 used in the
previous example with the 3x3mm MLP package with
ψ_JB = 2.8°C/W. The 3x3mm MLP package could
operate at a PCB temperature of 118°C, while
maintaining the junction temperature below 120°C. This
illustrates that the physically smaller MLP package with
thermal pad offers a more conductive path to remove
the heat from the driver. Consider tradeoffs between
reducing overall circuit size with junction temperature
reduction for increased reliability.
© 2007 Fairchild Semiconductor Corporation
FAN3223 / FAN3224 / FAN3225 • Rev. 1.0.5
19
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