FAN7318A Datasheet, PDF (17/24 Pages) Fairchild Semiconductor – LCD Backlight Inverter Drive IC

During striking mode, burst dimming operation is
disabled to guarantee continuous striking time. Figure
42 shows burst dimming disabled during striking mode.
2.5
2
BCT
1.5
BDIM
1
0.5
0
2
3
4
5
6
7
8
9
10
11
12
x 10^-3
2
CMP
1.5
1
0.5
0
2
3
4
5
6
7
8
9
10
11
12
Striking normal mode
x 10^-3
mode
0.01
i_Lamp
0.005
0
-0.005
-0.01
-0.015
2
3
4
5
6
7
8
9
10
11
12
x 10^-3
Figure 42. Burst Dimming During Striking Mode
When BDIM is setting over 2.2VDC and BCT is inputted
PWM pulse signal, this structure can be implemented as
positive dimming polarity. Figure 43 shows burst
dimming using PWM pulse as BDIM signal.
Soft-Start
A soft-start circuit ensures a gradual increase in the
input and output power. FAN7318A has no soft-start pin,
but provides soft-start function using the first BCT
waveform. The first BCT waveform limits CMP voltage at
initial operation, so lamp current increases gradually.
Figure 45. Soft-Start in Normal Mode
Figure 43. Positive Burst Dimming Implementation
Circuit Using an External Pulse
Figure 44 shows the lamp current waveform vs. an
external pulse in positive burst dimming mode.
Figure 46. Soft-Start in Burst Dimming Mode
Output Drives
FAN7318A is designed to drive P-N half-bridge
MOSFETs with symmetric duty cycle. FAN7318A can
drive a P-MOSFET directly without a level-shift capacitor
and a Zener diode. A fixed dead time of 500ns is
introduced between two outputs at maximum duty cycle,
as shown in Figure 47.
CT
CMP
Dead time
500ns at max. duty
SYNC
T
OUTA
OUTB
Figure 47. MOSFETs Gate Drive Signal
Figure 44. Positive Burst Dimming Waveform Using
an External Pulse
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
17
www.fairchildsemi.com