FAN7318A Datasheet, PDF (15/24 Pages) Fairchild Semiconductor – LCD Backlight Inverter Drive IC

Functional Description
UVLO
The under-voltage lockout (UVLO) circuit guarantees the
stable operation of the IC’s control circuit by stopping
and starting it as a function of the VIN value. The UVLO
circuit turns on the control circuit when VIN exceeds
5.2V. When VIN is lower than 4.75V, the IC startup
current is less than 100µA.
ENA
Applying voltage higher than 1.4V to the ENA pin
enables the IC. Applying voltage lower than 0.7V to the
ENA pin disables the IC. In terms of the protections,
applying voltage higher than 2.5V to the ENA pin
disables OLP and SLP. Applying voltage lower than
2.1V to the ENA pin enables the OLP and the SLP.
Main Oscillator
In normal mode, the external timing capacitor (CT) is
charged by the current flowing from the reference
voltage source, which is formed by the timing resistor
(RT) and the timing capacitor (CT). The sawtooth
waveform charges up to 2V. Once CT voltage reaches
2V, the CT begins discharging down to 0.4V. Next, the
CT starts charging again and a new switching cycle
begins, as shown in Figure 35. The main frequency is
programmed by adjusting the RT and CT value. The
main frequency is calculated as:
f_OSC
=
1
RT
⋅
CT
⋅
ln
⎛
⎜⎝
3.9585 ⋅RT − 13650
2.61⋅RT − 13650
[Hz]
⎞
⎟⎠
(1)
f_str =
⎛
⎜
13.65
1
+
(
3I₁
−
4.55I₂
)
RT
⎞
⎟
[Hz]
RT
⋅
CT
⋅
ln
⎜
⎜
⎜
−I₁ ⋅I₂ ⋅ RT²
13.65 + (4.55I₁
−
3I₂
)
RT
⎟
⎟
⎟
(2)
⎜⎝ _{−I1 ⋅I2 ⋅RT}2
⎟⎠
QI₁ = 12 ×10^-6A, I₂ = 1.128 ×10^-3A
Burst Dimming Oscillator
The burst dimming timing capacitor (BCT) is charged by
the current flowing from the reference voltage source,
which is formed by the burst dimming timing resistor
(BRT) and the burst dimming timing capacitor (BCT).
The sawtooth waveform charges up to 2V. Once the
BCT voltage reaches 2V, the capacitor begins
discharging down to 0.5V. Next, the BCT starts charging
again and a new burst dimming cycle begins, as shown
in Figure 36. The burst dimming frequency is
programmed by adjusting the BCT and BRT values. The
burst dimming frequency is calculated as:
f_OSCB
=
1
BRT ⋅ BCT ⋅ ln⎜⎛ ^{0.039 ⋅ BRT}
[Hz]
− 4500 _⎟⎞
(3)
⎝ ^{0.026 ⋅ BRT − 4500} ⎠
To avoid visible flicker, the burst dimming frequency
should be greater than 120Hz.
Figure 35. Main Oscillator Circuit
In striking mode, the external timing capacitor (CT) is
charged by the current flowing from the reference
voltage source and 12μA current source, which
increases the frequency. If the product of RT and CT
value is constant, the striking frequency is depending on
CT and is calculated as:
Figure 36. Burst Dimming Oscillator Circuit
Analog Dimming
For analog dimming, the lamp intensity is controlled with
the external dimming signal (VADIM) and resistors. Figure
37 shows how to implement an analog dimming circuit.
CMP
V_ADIM
ADIM
Negative
Analog
Dimm ing
V_{REF +} Error Amp.
-
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
OLP max .
Figure 37. Analog Circuit Implementation
www.fairchildsemi.com
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