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FAN2110 Datasheet, PDF (15/17 Pages) Fairchild Semiconductor – TinyBuck™, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator
Figure 33.ILIM Network
The ILIM pin can source a 10µA current that can be
used to establish a lower, temperature–dependent,
current-limit threshold by connecting an external
resistor (RILIM) to AGND. RILIM can be approximated with
the equation:
RILIM (KΩ)
=
95 +
6.1• IOUT
+
(VIN − 1.8) •VOUT • 3.33 •106
(RRAMP + 2) •VIN • f
(7)
where:
IOUT = Full load current in Amps;
VOUT = Set output voltage;
VIN = Input voltage;
RRAMP = Ramp resistor used in KΩ; and
f = Selected switching frequency in KHz.
After 16 consecutive, pulse-by-pulse, current-limit
cycles, the fault latch is set and the regulator shuts
down. Cycling VCC or EN restores operation after a
normal soft-start cycle (refer to Auto-Restart section).
The over-current protection fault latch is active during
the soft-start cycle. Use a 1% resistor for RILIM.
Always use an external resistor RILIM to set the current
limit at the desired level. When RILIM is not connected,
the IC’s internal default current limit is fairly high. This
could lead to operation at high load currents, causing
overheating of the regulator. For a given RILIM and
RRAMP setting, the current limit point varies slightly in an
inverse relationship with respect to input voltage (VIN).
Loop Compensation
The loop is compensated using a feedback network
around the error amplifier. Figure 34 shows a complete
type-3 compensation network. For type-2
compensation, eliminate R3 and C3.
Figure 34. Compensation Network
Since the FAN2110 employs summing current-mode
architecture, type-2 compensation can be used for
many applications. For applications that require wide
loop bandwidth and/or use very low-ESR output
capacitors, type-3 compensation may be required.
RRAMP also provides feedforward compensation for
changes in VIN. With a fixed RRAMP value, the modulator
gain increases as VIN is reduced, which could make it
difficult to compensate the loop. For low-input-voltage-
range designs (3V to 8V), RRAMP and the compensation
component values will be different compared to designs
with VIN between 8V and 24V.
Recommended PCB Layout
Good PCB layout and careful attention to temperature
rise is essential for reliable operation of the regulator.
Four-layer PCB with two-ounce copper on the top and
bottom side and thermal vias connecting the layers is
recommended. Keep power traces wide and short to
minimize losses and ringing. Do not connect AGND to
PGND below the IC. Connect the AGND pin to PGND at
the output OR to the PGND plane.
SW
VIN
GND
GND
VOUT
Figure 35. Recommended PCB Layout
© 2008 Fairchild Semiconductor Corporation
FAN2110 • Rev. 1.0.2
15
www.fairchildsemi.com