FAN5059MX Datasheet, PDF (13/18 Pages) Fairchild Semiconductor – High Performance Programmable Synchronous DC-DC Controller for Multi-Voltage Platforms

PRODUCT SPECIFICATION
FAN5059
5V
V_SS
2.75V
2.25V
t₁
t₂
t₃
T(0)
T
The softstart ramp begins at T(0) where UVLO is released.
During the period of t₁ the softstart pin ramps but the PWM
switching is not enabled and thus the duty cycle is zero
(D=0) and the output voltage is zero. During t₂ the duty
cycle increased progressively from 0 to 1. This period is
where the output voltage ramps, dependent on output capaci-
tance and output load. If the duration of t₂ is long enough
the output voltage will fully ramp to the point of regulation.
During t₃ the softstart pin continues to ramp but without
effect on the output voltage.
NOTE: If a very large output capacitor bank is used it may
be required to use a larger C_SS to ensure a full output voltage
ramp within t₂.
Over-Voltage Protection
The FAN5059 constantly monitors the output voltage for pro-
tection against over-voltage conditions. If the voltage at the
VFB pin exceeds the selected program voltage, an over-volt-
age condition is assumed and the FAN5059 disables the out-
put drive signal to the external high-side MOSFET. The DC-
DC converter returns to normal operation after the output
voltage returns to normal levels.
Oscillator
The FAN5059 oscillator section uses a fixed frequency of
operation of 300KHz.
Design Considerations and Component
Selection
Additional information on design and component selection
may be found in Fairchild’s Application Note 57.
MOSFET Selection
This application requires N-channel Logic Level Enhancement
Mode Field Effect Transistors. Desired characteristics are as
follows:
• Low Static Drain-Source On-Resistance, R_DS,ON < 20mΩ
(lower is better)
• Low gate drive voltage, V_GS = 4.5V rated
• Power package with low Thermal Resistance
• Drain-Source voltage rating > 15V.
The on-resistance (R_DS,ON) is the primary parameter for
MOSFET selection. The on-resistance determines the power
dissipation within the MOSFET and therefore significantly
affects the efficiency of the DC-DC Converter. For details
and a spreadsheet on MOSFET selection, refer to Applica-
tions Bulletin AB-8.
Inductor Selection
Choosing the value of the inductor is a tradeoff between
allowable ripple voltage and required transient response. The
system designer can choose any value within the allowed
minimum to maximum range in order to either minimize ripple
or maximize transient performance. The first order equation
(close approximation) for minimum inductance is:
L_min =
(Vin – V_out)
f
V_out
x
x
V_in
ESR
V_ripple
where:
V_in = Input Power Supply
V_out = Output Voltage
f = DC/DC converter switching frequency
ESR = Equivalent series resistance of all output capacitors in
parallel
V_ripple = Maximum peak to peak output ripple voltage budget.
The first order equation for maximum allowed inductance is:
L_max = ^2CO ^{(Vin – Vout) Dm Vtb}
I_pp2
where:
C_o = The total output capacitance
I_pp = Maximum to minimum load transient current
V_tb = The output voltage tolerance budget allocated to load
transient
D_m = Maximum duty cycle for the DC/DC converter (usually
95%).
Some margin should be maintained away from both L_min and
L_max. Adding margin by increasing L almost always adds
expense since all the variables are predetermined by system
performance except for C_O, which must be increased to
increase L. Adding margin by decreasing L can be done by
purchasing capacitors with lower ESR. The FAN5059
provides significant cost savings for the newer CPU systems
that typically run at high supply current.
FAN5059 Short Circuit Current Characteristics
The FAN5059 protects against output short circuit on the
core supply by turning off both the high-side and low-side
MOSFETs and resetting softstart. The short circuit limit is
set with the R_S resistor, as given by the formula
R_S =
I_SC *R_{DS, on}
I_Detect
Note: R_S cannot exceed 10.8K. If a higher current is required
than 10.8K allows, a FET with lower R_DSon must be used.
REV. 1.0.4 8/14/03
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