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FAN302HLMY Datasheet, PDF (13/18 Pages) Fairchild Semiconductor – PWM Controller for Low Standby Power Battery- Charger Applications — mWSaver™ Technology
I HV
= VDL −VHV
RHV
VDL
RHV
VDL
Figure 34.V-I Characteristics of HV Pin
Frequency Hopping
EMI reduction is accomplished by frequency hopping,
which spreads the energy over a wider frequency range
than the bandwidth of the EMI test equipment. The
frequency-hopping circuit changes the switching
frequency progressively between 82kHz and 88kHz with
a period of tp, as shown in Figure 35.
Figure 35. Frequency Hopping
Burst-Mode Operation
The power supply enters Burst Mode at no-load or
extremely light-load conditions. As shown in Figure 36,
when VFB drops below VFBL; the PWM output shuts off
and the output voltage drops at a rate dependent on
load current. This causes the feedback voltage to rise.
Once VFB exceeds VFBH, the internal circuit starts to
provide switching pulse. The feedback voltage then falls
and the process repeats. Burst Mode operation
alternately enables and disables switching of the
MOSFET, reducing the switching losses in Standby
Mode. Once FAN302HLMY_F117 enters Burst Mode,
the operating current is reduced from 3.5mA to 200μA to
minimize power consumption.
Figure 36. Burst-Mode Operation
Slope Compensation
The sensed voltage across the current-sense resistor is
used for Current-Mode control and pulse-by-pulse
current limiting. A synchronized ramp signal with
positive slope is added to the current sense information
at each switching cycle, improving noise immunity of
Current-Mode control.
Protections
The self-protection functions include VDD Over-Voltage
Protection (OVP), internal Over-Temperature Protection
(OTP), VS Over-Voltage Protection (OVP), and
brownout protection. VDD OVP and brownout protection
are implemented as Auto-Restart Mode, while the VS
OVP and internal OTP are implemented as Latch Mode.
When an Auto-Restart Mode protection is triggered,
switching is terminated and the MOSFET remains off,
causing VDD to drop. When VDD drops to the VDD turn-off
voltage of 5V; the protection is reset, the internal startup
circuit is enabled, and the supply current drawn from the
HV pin charges the hold-up capacitor. When VDD
reaches the turn-on voltage of 16V, normal operation
resumes. In this manner, auto-restart alternately
enables and disables MOSFET switching until the
abnormal condition is eliminated, as shown in Figure 37.
When a Latch Mode protection is triggered, PWM
switching is terminated and the MOSFET remains off,
causing VDD to drop. When VDD drops to the VDD turn-off
voltage of 5V, the internal startup circuit is enabled
without resetting the protection and the supply current
drawn from HV pin charges the hold-up capacitor. Since
the protection is not reset, the IC does not resume PWM
switching even when VDD reaches the turn-on voltage of
16V, disabling HV startup circuit. Then VDD drops down
to 5V. In this manner, the Latch Mode protection
alternately charges and discharges VDD until there is no
more energy in the DC link capacitor. The protection is
reset when VDD drops to 2.5V, which is allowed only
after the power supply is unplugged from the AC line, as
shown in Figure 38.
© 2012 Fairchild Semiconductor Corporation
FAN302HLMY_F117 • Rev. 1.0.1
13
www.fairchildsemi.com