FAN5098 Datasheet, PDF (12/17 Pages) Fairchild Semiconductor – Two Phase Interleaved Synchronous Buck Converter for AMD Hammer™

FAN5098
PRODUCT SPECIFICATION
Note: The charge pump for the HIDRVs should be based on
the “B” phase of the FAN5098, since the “A” phase is off in
E*-mode.
Internal Voltage Reference
The reference included in the FAN5098 is a precision band-
gap voltage reference. Its internal resistors are precisely
trimmed to provide a near zero temperature coefficient (TC).
Based on the reference is the output from an integrated 5-bit
DAC. The DAC monitors the 5 voltage identification pins,
VID0-4, and scales the reference voltage from 800mV to
1.550V in 25mV steps. The output will be offset at 0A load
to +25mV vs. DAC output.
BYPASS Reference
The internal logic of the FAN5098 runs on 5V. To permit the
IC to run with 12V only, it produces 5V internally with a
linear regulator, whose output is present on the BYPASS pin.
This pin should be bypassed with a 100nF capacitor for noise
suppression. The BYPASS pin should not have any external
load attached to it.
Dynamic Voltage Adjustment
The FAN5098 can have its output voltage dynamically
adjusted to accommodate low power modes. The output slew
rate is controlled to 5mV/µsec. The designer must ensure
that the transitions on the VID lines all occur simultaneously
(within less than 500nsec) to avoid false codes generating
undesired output voltages. The Power Good flag tracks the
VID codes, but has a 500µsec delay transitioning from high
to low; this is long enough to ensure that there will not be
any glitches during dynamic voltage adjustment.
Power Good (PWRGD)
The FAN5098 Power Good function is designed in accor-
dance with the Hammer™ DC-DC converter specifications
and provides a continuous voltage monitor on the VFB pin.
The circuit compares the VFB signal to the VREF voltage
and outputs an active-low interrupt signal to the CPU should
the power supply voltage be less than 350mV less than nom-
inal setpoint. The output is guaranteed open-collector high
otherwise. The Power Good flag provides no control
functions to the FAN5098.
Output Enable/Soft Start (ENABLE/SS)
The FAN5098 will accept an open collector/TTL signal for
controlling the output voltage. The low state disables the
output voltage. When disabled, the PWRGD output is in the
low state.
Even if an enable is not required in the circuit, this pin
should have attached a capacitor (typically 100nF) to soft-
start the switching. A softstart capacitor may be approxi-
mately chosen by the formula:
t_D = ₁--^C--₀---^S-_µ--^S-_A--- • ⁽---¹---^.--⁷-----+-----⁰---^.--⁹---₂₀---_.7--₅--⁴-----^•----^V----^O----^U----^T---⁾
t_R = ₁--^C--₀---^S-_µ--^S-_A--- • -^V----^O----^U-_V--^T---_I-_N-^•----⁰---^.--⁹--
where: tD is the delay time before the output starts to ramp
tR is the ramp time of the output
CSS = softstart cap
VOUT = nominal output voltage
However, C must be ≥ 100nF.
Programmable Active Droop™
The FAN5098 features Programmable Active Droop™: as
the output current increases, the output voltage drops propor-
tionately an amount that can be programmed with an exter-
nal resistor. This feature is offered in order to allow
maximum headroom for transient response of the converter.
The current is sensed losslessly by measuring the voltage
across the low-side MOSFET during its on time. Consult the
section on current sensing for details. The droop is adjusted
by the droop resistor changing the gain of the current loop.
Note that this method makes the droop dependent on the
temperature and initial tolerance of the MOSFET, and the
droop must be calculated taking account of these tolerances.
Given a maximum output current, the amount of droop can
be programmed with a resistor to ground on the droop pin,
according to the formula
R_Droop(Ω) = -_I-_m-^V----_aD---_x-^r--^o-_•--^o--_R-^p----_D^•---_S--^R--_,--_oT---_n-
with VDroop the desired droop voltage, RT the oscillator
resistor, Imax the output current at which the droop is desired,
and RDS, on the on-state resistance of one phase’s low-side
MOSFET.
Important Note! The oscillator frequency must be selected
before selecting the droop resistor, because the value of RT is
used in the calculation of RDroop.
Over-Voltage Protection
The FAN5098 constantly monitors the output voltage for
protection against over-voltage conditions. If the voltage at
the VFB pin exceeds 2.2V, an over-voltage condition is
assumed and the FAN5098 latches on the external low-side
MOSFET and latches off the high-side MOSFET. The
DC-DC converter returns to normal operation only after VCC
has been recycled.
Over Temperature Protection
If the FAN5098 die temperature exceeds approximately
150°C, the IC shuts itself off. It remains off until the temper-
ature has dropped approximately 25°C, at which time it
resumes normal operation.
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REV. 1.0.7 2/18/03