FAN5098 Datasheet, PDF (1/17 Pages) Fairchild Semiconductor – Two Phase Interleaved Synchronous Buck Converter for AMD Hammer™

www.fairchildsemi.com
FAN5098
Two Phase Interleaved Synchronous Buck Converter
for AMD^® Hammer™
Features
• Programmable output from 800mV to 1.550V in 25mV
steps using an integrated 5-bit DAC
• Two interleaved synchronous phases for maximum
performance
• 100nsec transient response time
• Built-in current sharing between phases
• Remote sense
• Programmable Active Droop^ (Voltage Positioning)
• Programmable switching frequency from 100KHz to
1MHz per phase
• Adaptive delay gate switching
• Integrated high-current gate drivers
• Integrated Power Good, OV, UV, Enable/Soft Start
functions
• Drives N-channel MOSFETs
• Operation optimized for 12V operation
• High efficiency mode (E*) at light load
• Overcurrent protection using MOSFET sensing
• 24 pin TSSOP package
Applications
• VRM/VRD for 64-Bit Athlon™ and Opteron™ CPU’s
• VRM/VRD for Advanced CPU’s
• Programmable step-down power supply
Description
The FAN5098 is a synchronous two-phase DC-DC controller
IC which provides a highly accurate, programmable output
voltage for the AMD^® Hammer™ processor. Two inter-
leaved synchronous buck regulator phases with built-in cur-
rent sharing operate 180° out of phase to provide the fast
transient response needed to satisfy high current applications
while minimizing external components.
The FAN5098 features Programmable Active Droop^ for
transient response with minimum output capacitance. It has
integrated high-current gate drivers, with adaptive delay gate
switching, eliminating the need for external drive devices.
The FAN5098 uses a 5-bit D/A converter to program the out-
put voltage from 800mV to 1.550V in 25mV steps with an
accuracy of 1%. The FAN5098 uses a high level of integra-
tion to deliver load currents in excess of 50A from a 12V
source with minimal external circuitry.
The FAN5098 also offers integrated functions including
Power Good, Output Enable/Soft Start, under-voltage lock-
out, over-voltage protection, and adjustable current limiting
with independent current sense on each phase. It is available
in a 24 pin TSSOP package.
Block Diagram
23
RT
OSC
5-Bit
DAC
1 23 4 5
VID0 VID2 VID4
VID1 VID3
BYPASS
+12V
6
18
5V Reg
UVL O
+
Digital
-
Control
-
-
Current
+
+
Limit
-
GNDA
+
+12V
Power
Good
-
Digital
+
Control
+12V
24
19
21
7
PWRGD _{DROOP/E* AGND}
22
ENABLE/SS
20
ILIM
BOOT A
13
14
15
17
16
BOOT B
12
11
10
8
9
Athlon™ and Hammer™ are registered trademarks of AMD^®. Programmable Active Droop is a trademark of Fairchild Semiconductor.
+12V
VO
+12V
REV. 1.0.7 2/18/03