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FAN302UL Datasheet, PDF (12/19 Pages) Fairchild Semiconductor – PWM Controller for Low Standby Power Battery-Charger Applications
CCM Prevention Function
Even if the power supply is designed to operate in DCM,
it can go into Continuous Conduction Mode (CCM)
when there is not enough design margin to cover all the
circuit parameter variations and operating conditions.
FAN302UL has a CCM-prevention function that delays
the next cycle turn-on of MOSFET until ZCD on the VS
pin is obtained, as shown in Figure 31. To guarantee
stable DCM operation, FAN302UL prohibits the turn-on
of the next switching cycle for 10% of its switching
period after ZCD is obtained. In Figure 31, the first
switching cycle has ZCD before 90% of its original
switching period and, therefore, the turn-on instant of
the next cycle is determined from its original switching
period without being affected by the ZCD instant. The
second switching cycle does not have ZCD by the end
of its original switching period. The turn-on of the third
switching cycle occurs after ZCD is obtained, with a
delay of 10% of its original switching period. The
minimum switching frequency the CCM-prevention
function allows is 22kHz (fOSC-CM-MIN). If the ZCD is not
given until the end of maximum switching period of
45.5µs (1/22kHz), the converter can go into CCM
operation losing output regulation.
Figure 32. Power-Limit Mode Operation
High-Voltage (HV) Startup
Figure 33 shows the high-voltage startup circuit for
FAN302UL applications. Internally a JFET is used to
implement the high-voltage current source, whose
characteristics are shown in Figure 34. Technically, the
HV pin can be directly connected to the DC link (VDL).
However, to improve reliability and surge immunity, it is
typical to use about 100kΩ resistor between the HV pin
and DC link. The actual HV current with given DC link
voltage and startup resistor is determined by the
intersection of V-I characteristics line and load line, as
shown in Figure 34.
During startup, the internal startup circuit is enabled and
the DC link supplies the current, IHV, to charge the hold-
up capacitor, CVDD, through RSTART. When the VDD
voltage reaches VDD-ON, the internal HV startup circuit is
disabled and the IC starts PWM switching. Once the HV
startup circuit is disabled, the energy stored in CVDD
should supply the IC operating current until the
transformer auxiliary winding voltage reaches the
nominal value. Therefore, CVDD should be designed to
prevent VDD from dropping to VDD-OFF before the auxiliary
winding builds up enough voltage to supply VDD.
Figure 31. CCM Prevention Function
Power-Limit Mode
When the sampled voltage of VS (VSH) drops below VS-
CM-MIN (0.55V), FAN302UL enters Constant Power Limit
Mode, where the primary-side current limit voltage (VCS)
changes from VSTH (0.7V) to VSTH-VA (0.3V) to avoid
miss-operation of VS sampling and ZCD, as shown in
Figure 32. Once the VS sampling voltage is higher than
VS-CM-MAX (0.75V), the VCS returns to VSTH. This mode
prevents the power supply from going into CCM and
losing output regulation when the output voltage is too
low. This effectively protects the power supply when
there is a fault condition in the load, such as output
short or overload. This operation mode also implements
soft-start by limiting the transformer current until the VS
sampling voltage reaches VS-CM-MAX (0.75V).
© 2011 Fairchild Semiconductor Corporation
FAN302UL • Rev. 1.0.3
12
Figure 33. HV Startup Circuit
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