FAN7024 Datasheet, PDF (11/16 Pages) Fairchild Semiconductor – 675mW CMOS Mono Power Amplifier with Shutdown

FAN7024
Application Informations
Power Supply Bypassing
Proper power supply bypassing is critical for low noise and high power supply rejection. A larger capacitor may help to
increase immunity to the supply noise. However, considering economical design, attaching 10uF electrolytic capacitor or tan-
talum capacitor with 0.1uF ceramic capacitor to the VDD pin as close as possible is enough to get a good supply noise rejec-
tion. The capacitor location on both the bypass pin and power supply pin should be as close to the device as possible.
Connecting a 1uF capacitor, CB, between the bypass pin and ground improves the internal bias voltage’s stability and
improves the amplifier’s PSRR. The PSRR improvements increase as the bypass pin capacitor value increases. The selection
of bypass capacitors, especially CB, depends on desired PSRR requirements, click and pop performance as explained in the
section, Proper Selection of External Components, system cost, and size constraints.
Shutdown Function
In order to reduce power consumption while not in use, the FAN7024 contains a shutdown function(pin 1) to externally turn
off the amplifier’s bias circuitry. This shutdown feature turns the amplifier off when a logic high is placed on the shutdown
pin. The trigger point between a logic low and high level is typically half supply. It is best to switch between ground and sup-
ply to provide maximum device performance. By switching the shutdown pin to the VDD, the supply current of the FAN7024
will be minimized in the shutdown mode. While the device isdisabled with shutdown pin voltages less than VDD, the shut-
down current may be greater than the typical value of 0.1uA. In either case, the shutdown pin should be tied to a definite volt-
age because leaving the pin floating may result in an unwanted state change. In many applications, a microcontroller or
microprocessor output is used to control the shutdown circuitry which provides a quick, smooth transition into shutdown.
Another solution is to use a single-pole, single-throw switch in conjunction with an external pull-up resistor.
When the switch is closed, the shutdown pin is connected to ground and the device is enabled. If the switch is open, the
FAN7024 will be disabled through the external pull-up resistor. This scheme guarantees that the shutdown pin will not float.
This prevents unwanted state changes.
Bridge Configuration Explantion
As shown in typical appliction circuit, the FAN7024 has two operational amplifiers internally, allowing for a few different
amplifier configurations. The first amplifier’s gain is externally configurable, while the second amplifier is internally fixed in
a unity-gain, inverting configuration. The close-loop gain of the first amplifier is set by selecting the ratio of RF to RI while the
second amplifier’s gain is fixed by two internal 20kΩ resistors. In the typical application circuit, the output of the first ampli-
fier serves as the input of the second amplifier which results in both amplifiers producing signals indentical in magnitude, but
out of phase 180°. Consequently the differential gain of the device is
A_VD
=
2 ⋅ -^R----^F-
R_I
(1)
By driving the load differentially through outputs VO1 and VO2, an amplifier configuration commonly referred to as "bridged
mode" is established. Bridged mode operation is different from the classical single-ended amplifier configuration where one
side of its load is connected to ground.
A bridge amplfier design has a few distinct advantages over the single-ended configuration, as it provides differential drive to
the load, thus doubling output swing for a specified supply voltage. Four times the output power is possible as compared to a
single-ended amplifier under the same conditions. This increase in attainable output power assumes that the amplifier is not
current limited or clipped.
A bridgge configuration , such as the one used in FAN7024, also creates a second advantage over single-ended amplifiers.
Since the differential outputs, VO1 and VO2, are biased at half-suppy, no net DC voltage exists across the load. This eliminates
the need for an output coupling capacitor which is required in a single supply, single-ended amplifier configuration. If an out-
put coupling capacitor is not used in a single-ended configuration, the half-supply bias across the load would result in both
increased internal IC power dissipation as well as permanant loudspeaker damage.
Adaptive Q-current Control Circuit
Among the several kinds of the analog amplifiers, a class-AB amplifier satisfies moderate total harmonic distortion(THD) and
the efficiency. In general, the output distortion is proportional to the quiescent-current(Q-current) of the output stage, but
power efficiency is inversely propotional to that. To satisfy both needs, an adaptive Q-current control(AQC) technique is pro-
posed. The AQC circuit controls the Q-current with respect to the amount of the output distortion, whereas it is not activated
when no input signals are applied or no output distortion is sensed.
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