FAN2106_09 Datasheet, PDF (11/15 Pages) Fairchild Semiconductor – 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator

MOSFET is fully enhanced. The fault latch is set
immediately upon detection.
The OV and high-side short fault protections are active
all the time, including during soft-start.
Over-Temperature Protection (OTP)
The chip incorporates an over-temperature protection
circuit that sets the fault latch when a die temperature of
about 150°C is reached. The IC restarts when the die
temperature falls below 125°C.
Auto-Restart
After a fault, EN pin is discharged by a 1µA current sink
to a 1.1V threshold before the internal 800KΩ pull-up is
restored. A new soft-start cycle begins when EN
charges above 1.35V.
Depending on the external circuit, the FAN2106 can be
configured to remain latched-off or to automatically
restart after a fault.
Table 1. Fault / Restart Configurations
EN Pin
Controller / Restart State
Pull to GND
OFF (Disabled)
Pull-up to VCC with 100K
No Restart – Latched OFF
(After VCC Comes Up)
Open
Immediate Restart After Fault
Cap. to GND
New Soft-Start Cycle After:
tDELAY (ms)=3.9 • C(nf)
When EN is left open, restart is immediate.
If auto-restart is not desired, tie the EN pin to the VCC
pin or pull it HIGH after VCC comes up with a logic gate
to keep the 1µA current sink from discharging EN to
1.1V. Figure 23 shows one method to pull up EN to VCC
for a latch configuration.
100K
15 VCC
FAN2106
14 EN
3.3n
Figure 23. Enable Control with Latch Option
Power-Good (PGOOD) Signal
PGOOD is an open-drain output that asserts LOW
when VOUT is out of regulation, as measured at the FB
pin. Thresholds are specified in the Electrical
Specifications section. PGOOD does not assert HIGH
until the fault latch is enabled (T1.0) (see Figure 22).
Application Information
Bias Supply
The FAN2106 requires a 5V supply rail to bias the IC
and provide gate-drive energy. Connect a ≥ 1.0µf X5R
or X7R decoupling capacitor between VCC and PGND.
Since VCC is used to drive the internal MOSFET gates,
supply current is frequency and voltage dependent.
Approximate VCC current (ICC) can be calculated using:
I_{CC(mA )}
=
4.58
+ [( ^{VCC − 5}
227
+
0.013) • (f
− 128)]
(1)
where frequency (f) is expressed in KHz.
Setting the Output Voltage
The output voltage of the regulator can be set from 0.8V
to 80% of VIN by an external resistor divider (R1 and
RBIAS in Figure 1). For output voltages > 5V, output
current rating may need to be de-rated depending upon
the ambient temperature, power dissipated in the
package and the PCB layout.
The external resistor divider is calculated using:
0.8V ₌ V_OUT − 0.8V _{+ 650nA}
(2)
R_BIAS
R1
Connect RBIAS between FB and AGND.
If R1 is open (see Figure 1), the output voltage is not
regulated eventually causing a latched fault after the
soft start is complete (T1.0)
If the parallel combination of R1 and RBIAS is ≤ 1KΩ, the
internal SS ramp is not released and the regulator does
not start.
Setting the Switching Frequency
Switching frequency is determined by an external resistor,
RT, connected between the R(T) pin and AGND:
R _{T (KΩ )}
=
(10⁶
/ f ) − 135
65
(3)
where RT is in KΩ and frequency (f) is in KHz.
The regulator cannot start if RT is left open.
Calculating the Inductor Value
Typically the inductor value is chosen based on ripple
current (ΔIL), which is chosen between 10 to 35% of the
maximum DC load. Regulator designs that require fast
transient response use a higher ripple-current setting,
while regulator designs that require higher efficiency
keep ripple current on the low side and operate at a
lower switching frequency. The inductor value is
calculated by the following formula:
© 2009 Fairchild Semiconductor Corporation
FAN2106 • Rev. 1.1.0
11
www.fairchildsemi.com