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FAN7093_12 Datasheet, PDF (10/14 Pages) Fairchild Semiconductor – High-Current PN Half-Bridge Driver
Control and Diagnostics
Input Circuit
The internal gate drivers for the MOSFETS are
controlled through inputs IN and /INH and are TTL /
CMOS-compatible Schmitt triggers with hysteresis.
Setting the /INH pin to HIGH enables the device. In this
condition, one of the two power MOSFETS turn on,
depending on the input level of the IN pin. To deactivate
both switches, the /INH pin must be set LOW. No
external driver is needed. The FAN7093 can interface
directly with a microcontroller as long as the maximum
ratings are not exceeded.
Dead-Time Generation
The dead time is generated on the control IC to prevent
shoot-through between the power MOSFETS. The
dead-time is independent of the selected slew rate to
reach a high PWM frequency of 60 kHz.
Adjustable Slew Rate
To optimize electromagnetic emission (EMI), the
switching speed of the MOSFETs is adjustable by an
external resistor. The slew rate pin, SR, allows
designers to optimize the balance between emission
and power dissipation within the application by
connecting an external resistor RSR to GND. If the SR
pin is open by design or if intermittent disconnect
occurs, the slew rate is set to the value shown in the
Power Stages - Dynamic Characteristics table.
Status Flag Diagnostic with Current-Sense
Capability
The status pin, IS, is used as a combined current
sense and error flag output. In normal operation
(Current-Sense Mode), a current source in the control
IC is connected to the status pin, which delivers a
current proportional to the forward load current flowing
through the active high-side or low-side MOSFET.
Current flow in the reverse direction cannot be
detected except for a marginal leakage current IIS(LK).
External resistor RIS determines the voltage per output
current. The current-sense ratio value is shown in the
Electrical Characteristics – Control and Diagnostics
table. In case of a fault condition, the status output is
connected to a current source independent of the load
current and provides IIS(lim). The maximum voltage at
the IS pin is determined by the choice of the external
resistor and the supply voltage. When in a current-limit
condition, IIS(lim), is active for a time 2 x tCLS; the flag
indicates the error for time tCL after the condition no
longer exists, but constantly stays active as long as the
current-limit condition exists.
Figure 6. Sense Current vs. Load Current
and Flag Current
Figure 7. Current Sense Mode, Normal Operation
© 2011 Fairchild Semiconductor Corporation
FAN7093 • Rev. 1.0.4
Figure 8. Error Flag Mode, Fault Condition
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