FQU13N10L_09 Datasheet, PDF (1/9 Pages) Fairchild Semiconductor – 100V LOGIC N-Channel MOSFET

FQD13N10L / FQU13N10L
100V LOGIC N-Channel MOSFET
January 2009
QFET^®
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology is especially tailored to minimize
on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation modes. These devices are
well suited for low voltage applications such as high
efficiency switching DC/DC converters, and DC motor
control.
Features
• 10A, 100V, R_DS(on) = 0.18Ω @V_GS = 10 V
• Low gate charge ( typical 8.7 nC)
• Low Crss ( typical 20 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• RoHS Compliant
D
D
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GS
D-PAK
FQD Series
GDS
I-PAK
FQU Series
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S
Absolute Maximum Ratings T_C = 25°C unless otherwise noted
Symbol
V_DSS
I_D
I_DM
V_GSS
E_AS
I_AR
E_AR
dv/dt
P_D
T_J, T_STG
T_L
Parameter
Drain-Source Voltage
Drain Current
- Continuous (T_C = 25°C)
- Continuous (T_C = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (T_A = 25°C) *
Power Dissipation (T_C = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8” from case for 5 seconds
FQD13N10L / FQU13N10L
100
10
6.3
40
± 20
95
10
4.0
6.0
2.5
40
0.32
-55 to +150
300
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Thermal Characteristics
Symbol
R_θJC
R_θJA
R_θJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
©2009 Fairchild Semiconductor International
Typ
Max
Units
--
3.13
°C/W
--
50
°C/W
--
110
°C/W
Rev. A5, January 2009