FQI13N50C Datasheet, PDF (1/9 Pages) Fairchild Semiconductor – 500V N-Channel MOSFET

FQB13N50C/FQI13N50C
500V N-Channel MOSFET
QFET ^TM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switched mode power supplies,
active power factor correction, electronic lamp ballasts
based on half bridge topology.
Features
• 13A, 500V, R_DS(on) = 0.48Ω @V_GS = 10 V
• Low gate charge ( typical 43nC)
• Low Crss ( typical 20pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
D
GS
D²-PAK
FQB Series
GDS
I²-PAK
FQI Series
D
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G!
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S
Absolute Maximum Ratings T_C = 25°C unless otherwise noted
Symbol
V_DSS
I_D
I_DM
V_GSS
E_AS
I_AR
E_AR
dv/dt
P_D
T_J, T_STG
T_L
Parameter
Drain-Source Voltage
Drain Current
- Continuous (T_C = 25°C)
- Continuous (T_C = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (T_C = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
FQB13N50C / FQI13N50C
500
13
8
52
± 30
860
13
19.5
4.5
195
1.56
-55 to +150
300
Thermal Characteristics
Symbol
Parameter
R_θJC
Thermal Resistance, Junction-to-Case
R_θJA
Thermal Resistance, Junction-to-Ambient *
R_θJA
Thermal Resistance, Junction-to-Ambient
* When mounted on the minium pad size recommended (PCB Mount).
Typ
Max
--
0.64
--
40
--
62.5
©2003 Fairchild Semiconductor Corporation
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Units
°C/W
°C/W
°C/W
Rev. A, October 2003