FDP18N20F Datasheet, PDF (1/10 Pages) Fairchild Semiconductor – N-Channel MOSFET 200V, 18A, 0.14Ω

FDP18N20F / FDPF18N20FT
N-Channel MOSFET
200V, 18A, 0.14Ω
Features
• R_DS(on) = 0.12Ω ( Typ.)@ V_GS = 10V, I_D = 9A
• Low gate charge ( Typ. 20nC)
• Low C_rss ( Typ. 24pF)
• Fast switching
• 100% avalanche tested
• Improve dv/dt capability
• RoHS compliant
September 2009
UniFET^TM
tm
Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary, planar
stripe, DMOS technology.
This advanced technology has been especially tailored to mini-
mize on-state resistance, provide superior switching perfor-
mance, and withstand high energy pulse in the avalanche and
commutation mode. These devices are well suited for high
efficient switching mode power supplies and active power factor
correction.
D
G
GDS
TO-220
FDP Series
GD S
TO-220F
FDPF Series
S
MOSFET Maximum Ratings T_C = 25^oC unless otherwise noted
Symbol
Parameter
V_DSS
V_GSS
I_D
I_DM
E_AS
I_AR
E_AR
dv/dt
P_D
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Drain Current
-Continuous (T_C = 25^oC)
-Continuous (T_C = 100^oC)
- Pulsed
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation
(T_C = 25^oC)
- Derate above 25^oC
T_J, T_STG
Operating and Storage Temperature Range
T_L
Maximum Lead Temperature for Soldering Purpose,
1/8” from Case for 5 Seconds
*Drain current limited by maximum junction temperature
Thermal Characteristics
FDP18N20F FDPF18N20FT
200
±30
18
18*
10.8
10.8*
(Note 1)
72
72*
(Note 2)
324
(Note 1)
18
(Note 1)
10
(Note 3)
4.5
100
41
0.83
0.33
-55 to +150
300
Units
V
V
A
A
mJ
A
mJ
V/ns
W
W/^oC
o_C
o_C
Symbol
R_θJC
R_θCS
R_θJA
Parameter
Thermal Resistance, Junction to Case
Thermal Resistance, Case to Sink Typ.
Thermal Resistance, Junction to Ambient
FDP18N20F FDPF18N20FT
1.2
3.0
0.5
-
62.5
62.5
Units
o_C/W
©2009 Fairchild Semiconductor Corporation
1
FDP18N20F / FDPF18N20FT Rev. A
www.fairchildsemi.com