FDMS9600S Datasheet, PDF (1/9 Pages) Fairchild Semiconductor – Dual N-Channel PowerTrench® MOSFET

FDMS9600S
Dual N-Channel PowerTrench^® MOSFET
Q1: 30V, 32A, 8.5mΩ Q2: 30V, 30A, 5.5mΩ
June 2007
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Features
General Description
Q1: N-Channel
„ Max r_DS(on) = 8.5mΩ at V_GS = 10V, I_D = 12A
„ Max r_DS(on) = 12.4mΩ at V_GS = 4.5V, I_D = 10A
Q2: N-Channel
„ Max r_DS(on) = 5.5mΩ at V_GS = 10V, I_D = 16A
„ Max r_DS(on) = 7.0mΩ at V_GS = 4.5V, I_D = 14A
„ Low Qg high side MOSFET
„ Low r_DS(on) low side MOSFET
„ Thermally efficient dual Power 56 package
This device includes two specialized MOSFETs in a unique dual
Power 56 package. It is designed to provide an optimal
Synchronous Buck power stage in terms of efficiency and PCB
utilization. The low switching loss "High Side" MOSFET is com-
plemented by a Low Conduction Loss "Low Side" SyncFET.
Applications
Synchronous Buck Converter for:
„ Notebook System Power
„ General Purpose Point of Load
„ Pinout optimized for simple PCB design
„ RoHS Compliant
G1
D1
D1
D1
D1
G2
S2
S2
S1/D2
S2
Power 56
5
Q2
6
7
8
4
3
2
Q1
1
MOSFET Maximum Ratings T_A = 25°C unless otherwise noted
Symbol
V_DS
V_GS
I_D
P_D
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current
-Continuous (Package limited) T_C = 25°C
-Continuous (Silicon limited) T_C = 25°C
-Continuous
T_A = 25°C
-Pulsed
Power Dissipation for Single Operation
T_J, T_STG
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 1a)
(Note 1b)
Q1
Q2
30
30
±20
±20
32
30
55
108
12
16
60
60
2.5
1.0
-55 to +150
Units
V
V
A
W
°C
R_θJA
R_θJA
R_θJC
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Case
Package Marking and Ordering Information
(Note 1a)
(Note 1b)
50
120
3
1.2
°C/W
Device Marking
FDMS9600S
Device
FDMS9600S
Package
Power 56
Reel Size
13”
Tape Width
12mm
Quantity
3000 units
©2007 Fairchild Semiconductor Corporation
1
FDMS9600S Rev.D
www.fairchildsemi.com