AN-6086 Datasheet, PDF (1/18 Pages) Fairchild Semiconductor – Design Consideration for Interleaved Boundary Conduction Mode PFC

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AN-6086
Design Consideration for Interleaved Boundary
Conduction Mode PFC Using FAN9611/12
1. Introduction
This application note presents practical step-by-step design
considerations for an interleaved Boundary-Conduction-
Mode (BCM) Power-Factor-Correction (PFC) converter
employing Fairchild PFC controllers FAN9611 and
FAN9612. It includes designing the inductor and Zero-
Current-Detection (ZCD) circuit, selecting the
components, and closing the control loop. The design
procedure is verified through an experimental 400W
prototype converter.
The FAN9611/12 interleaved dual BCM PFC controller
operates two parallel-connected boost power trains 180º
out of phase, extending the maximum practical power level
of this control technique from 200-300W to greater than
800W. Unlike the Continuous Conduction Mode (CCM)
technique often used at this power level, BCM offers
inherent zero-current switching of the boost diodes (no
reverse-recovery losses), which permits the use of less
expensive diodes without sacrificing efficiency.
Furthermore, the input and output filters can be made
smaller due to ripple cancellation between the power
stages and the effective doubling of the switching
frequency. The advanced line feed-forward with peak
detection circuit minimizes the output voltage variation
during line transients. To guarantee stable operation with
less switching loss at light load, the maximum switching
frequency is clamped at 525kHz. Interleaved
synchronization is maintained under all operating
conditions. Protection functions include output over-
voltage, over-current, open-feedback, under-voltage
lockout, brownout protection, and secondary latching
over-voltage protection.
Figure 1. Typical Application Circuit of FAN9611 or FAN9612
© 2009 Fairchild Semiconductor Corporation
Rev. 1.0.4 • 4/22/10
www.fairchildsemi.com