74LCX32373 Datasheet, PDF (1/8 Pages) Fairchild Semiconductor – Low Voltage 32-Bit Transparent Latch with 5V Tolerant Inputs and Outputs Preliminary

Preliminary
January 2001
Revised August 2001
74LCX32373
Low Voltage 32-Bit Transparent Latch
with 5V Tolerant Inputs and Outputs (Preliminary)
General Description
The LCX32373 contains thirty-two non-inverting latches
with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. The flip-flops
appear transparent to the data when the Latch Enable (LE)
is HIGH. When LE is LOW, the data that meets the setup
time is latched. Data appears on the bus when the Output
Enable (OE) is LOW. When OE is HIGH, the outputs are in
a high impedance state.
The LCX32373 is designed for low voltage (2.5V or 3.3V)
V_CC applications with capability of interfacing to a 5V signal
environment.
The LCX32373 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
I 5V tolerant inputs and outputs
I 2.3V–3.6V V_CC specifications provided
I 5.4 ns t_PD max (V_CC = 3.3V), 20 µA I_CC max
I Power down high impedance inputs and outputs
I Supports live insertion/withdrawal (Note 1)
I ±24 mA output drive (V_CC = 3.0V)
I Uses patented noise/EMI reduction circuitry
I Latch-up performance exceeds 500 mA
I ESD performance:
Human body model > 2000V
Machine model > 200V
I Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
(Preliminary)
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to V_CC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number Package Number
Package Description
74LCX32373GX
(Note 2)
BGA96A
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
(Preliminary) [TAPE and REEL]
Note 2: BGA package available in Tape and Reel only.
Logic Symbol
© 2001 Fairchild Semiconductor Corporation DS500547
www.fairchildsemi.com