FAN6754_09 Datasheet, PDF (12/14 Pages) Fairchild Semiconductor – Highly Integrated Green- Mode PWM Controller

The HV pin can perform current limit to shrink the
tolerance of OCP (Over-Current Protection) under full
range of AC voltage, to linearly current limit curve as
shown in Figure 25. FAN6754 also shrinks the Vlimit
level by half to lower the I²RSENSE loss to increase the
heavy-load efficiency.
0.47
0.46
0.45
0.44
0.43
0.42
0.41
0.4
0.39
0.38
100 120 140 160 180 200 220 240 260 280 300 320 340 360 380
DC Voltage on HV Pin (V)
Figure 25. Linearly Current Limit Curve
V_DD Over-Voltage Protection (OVP)
VDD over-voltage protection prevents damage due to
abnormal conditions. If the VDD voltage is over the over-
voltage protection voltage (VDD-OVP) and lasts for tD-
VDDOVP, the PWM pulses are disabled until the VDD
voltage drops below the UVLO, then starts again. Over-
voltage conditions are usually caused by open feedback
loops.
Thermal Protection
An NTC thermistor, RNTC, in series with resistor RA, can
be connected from the RT pin to ground. A constant
current IRT is output from the RT pin. The voltage on the
RT pin can be expressed as VRT=IRT • (RNTC + RPTC),
where IRT is 100µA. At high ambient temperature, RNTC
is smaller, such that VRT decreases. When VRT is less
than 1.035V (VRTTH1), the PWM turns off after 16ms
(tD-OTP1). If VRT is less than 0.7V (VRTTH2), PWM turns off
after 185µs (tD-OTP2).
Limited Power Control
The FB voltage increases every time the output of the
power supply is shorted or overloaded. If the FB voltage
remains higher than a built-in threshold for longer than
tD-OLP, PWM output is turned off. As PWM output is
turned off, VDD begins decreasing.
When VDD goes below the turn-off threshold (9V) the
controller is totally shut down and, VDD is continuously
discharged to VDD-OLP (6.5V) by IDD-OLP to lower the
average input power. This is called two-level UVLO. VDD
is cycled again. This protection feature continues as
long as the overloading condition persists. This
prevents the power supply from overheating due to
overloading conditions.
Noise Immunity
Noise on the current sense or control signal may cause
significant pulse-width jitter, particularly in continuous-
conduction mode. Slope compensation helps alleviate
this problem. Good placement and layout practices
should be followed. Avoiding long PCB traces and
component leads, locating compensation and filter
components near the FAN6754, and increasing the
power MOS gate resistance improve performance.
© 2009 Fairchild Semiconductor Corporation
FAN6754 • Rev. 1.0.1
12
www.fairchildsemi.com