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XRP7662 Datasheet, PDF (9/19 Pages) Exar Corporation – 12A 300KHz Synchronous Step Down Regulator
XRP7 66 2
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1 2 A 3 0 0 KHz Sy n ch r on ou s St ep Dow n Reg u lat or
THEORY OF OPERATION
GENERAL OVERVIEW
The XRP7662 is a fixed frequency, voltage
mode, synchronous PWM regulator optimized
for high efficiency. The part has been
specifically designed for single supply
operation from a 5V to 22V input.
The heart of the XRP7662 is a wide bandwidth
transconductance amplifier
designed to
accommodate Type II and Type III
compensation schemes. A precision 0.8V
reference, present on the positive terminal of
the error amplifier, permits the programming
of the output voltage down to 0.8V via the VFB
pin. The output of the error amp lifier, COMP, is
compared to a 1.1V peak -to - peak ramp, which
is responsible for trailing edge PWM control.
This voltage ramp and PWM control logic are
governed by the internal oscillator that
accura tely sets the PWM frequency to 3 00kHz.
The XRP7662 contain s two unique control
features that are very powerful in distributed
applications. First, non - synchronous driver
control is enabled during startup, to prohibit
the low side switch from pulling down the
output until the high side switch has
attempted to turn on. Second, a 100% duty
cycle timeout ensures that the low side switch
is periodically enhanced during extended
periods at 100% duty cycle. This guarantees
the synchronized refreshing of the BST
capacitor during very large duty ratios.
The XRP7662 also co ntains a number of
valuable protection features. Programmable
VIN UVLO allows the user to set the exact
value at which the conversion voltage can
safely begin down - conversion, and an internal
VCC UVLO which ensures that the controller
itself has enough vol tage to properly operate.
Other protection features include thermal
shutdown and short - circuit detection. In the
event that either a thermal, short
- circuit, or
UVLO fault is detected, the XRP7662 is forced
into an idle state where the output drivers are
he ld off for a finite period before a restart is
attempted.
SOFT START
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verter ramps up the output voltage while
controlling the magnitude of the input sup
ply
source current. In a modern step down
converter, rampin g up the positive terminal of
the error amplifier controls soft start. As a
result, excess source current can be defined as
the current required to charge the output
capacitor.
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The XRP7662 provides the user with the
option to program the soft start rate by tying
a capacitor from the SS pin to GND. The
selection of this capacitor is based on the
Nj$SXOOntXprSesenFt Xat UtheUSHS pin and
the 0.8V reference voltage. Therefore, the
excess source can be redefined as:
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UNDER V OLTAGE LOCK OUT (UVLO)
The XRP7662 has two separate UV LO
comparators to monito r the bias (Vcc) and
Input (V IN ) voltages independently. The Vcc
UVLO is internally set to 4.25V. The Vin UVLO
is programmable through UVIN pin. When
UVIN pin is greater than 2.5V the
XRP7662 is
permitted to start up pending the removal of
all other faults . A pair of internal resistors is
connected to UVIN as shown in Figure 18.
VIN
R6
UVIN
R7
166k:
VIN UVLO
+
2.50V ON -
2.20V OFF
59k:
Fig. 18 : In ternal and External Bias of UVIN
Therefore without external biasing the V
IN
start threshold is 9.5V. A small capacitor
may
be required between UVIN and GND to filter
out noise. For applications with V IN of 5V or
3.3V, connect UVIN directly to V IN . To program
© 2012 Exar Corporation
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Rev. 2. 2.0