XRP7662 Datasheet, PDF (11/19 Pages) Exar Corporation – 12A 300KHz Synchronous Step Down Regulator

XRP7 66 2
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1 2 A 3 0 0 KHz Sy n ch r on ou s St ep Dow n Reg u lat or
Fig. 20 : Over Current Detection C ircuit
for I MAX>60mV/DCR
Decreasing the Current Limit
If it is required to set I _MAX<(60mV/DCR), a
resistor can be added as shown in Figure
21 .
R₈ increases the net voltage detected by the
current - sense comparator. Voltage at the
positive and negative term inal of comparator
is given by:
ܸܵܲൌܸ_{ை௎்}൅ሺܫ_{ெ஺௑}ൈܥܦሻܴ
ܸܵܰൌܸ_{ை௎்}ൈ൬ܴ_ସ^{ܴ൅଼}_଼ܴ൰
Since the comparator is triggered at 60mV:
ܸܵܲെܸܵܰൌ͸Ͳܸ݉
Combining the above equations and solving for
R₈:
Ü´_଼ൌܴ_ସൈܸ^ை௎_͸^{்െͲ݉͸ܸͲ݉െܸሺ}_Ü«^àµ_ெ஺^ሺܫ_{௑ெൈ}^஺_ܦ^௑ൈ_{ܦܥሻܴ}^{ܥሻܴ}
As an example: for I _MAX of 12 A and V _OUT of
3.3V, calculated R ₈ is 1. 5MÆ»
Fig. 21 : Over Current Detection Circuit
for I MAX<(60mV/DCR)
H ANDLING OF FAULTS
Upon the detection of power (UVLO), thermal,
or sho rt - circuit faults, the XRP7662 is forced
into an idle state where the SS and COMP pins
are pulled low and both switches are held off.
In the event of UVLO fault, the
XRP7662
remains in this idle state until the UVLO fault
is removed. Upon the detection of
a thermal or
sho rt - circuit fault, an internal 200 ms timer is
activated. In the event of a short -circuit fault,
a restart is at tempted immediately after the
12 0ms timeout expires. Whereas, when a
thermal fault is detected the
200 ms delay
continuously recycl es and a restart cannot be
attempted until the thermal fault is removed
and the timer expires.
ERROR A MPLIFIER AND V OLTAGE LOOP
The heart of the XRP7662 control loop is a
high performance, wide bandwidth
transconductance amplifier.
Because of the
amplifier ¶V FXUUHQW OLPLWHG 
transconductance, there are many ways to
compensate the voltage loop or to control the
COMP pin externally. A simple, single pole,
single zero compensation can be a RC to
ground. However Exar recommends a Type II
or Type III com pensation which eliminates the
gm of the amplifier from the control loop
equations. The amplifier has enough
bandwidth (45° at 4 MHz) and enough gain
(60dB) to run Type III compensation schemes
with adequate gain and phase margins at
cross over frequencies greater than 50kHz.
The common mode output of the error
amplifier is 0.9V to 2.2V. Therefore, the PWM
voltage ramp has been set between 1.1V and
2.2V to ensure proper 0% to 100% duty cycle
capability. The voltage loop also includes two
other very importan t features. One is a non -
synchronous startup mode. Basically, the
synchronous rectifier cannot turn on unless
the high side switch has attempted to turn on
or the SS pin has exceeded 1.7V. This feature
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the outpu t voltage during startup or in fault
modes.
© 2012 Exar Corporation
11 / 19
Rev. 2. 2.0