XRD6414 Datasheet, PDF(8/16 Page) Exar Corporation – CMOS 10-Bit, 20 MSPS, High Speed Analog-to-Digital Converter with 4:1 Input Analog Multiplexer

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XRD6414 Datasheet, PDF (8/16 Pages) Exar Corporation – CMOS 10-Bit, 20 MSPS, High Speed Analog-to-Digital Converter with 4:1 Input Analog Multiplexer

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XRD6414

FINAL DESIGN CONSIDERATIONS

The XRD6414 can be evaluated with the XRD6414AB

application board. Contact your distributor or sales

person for delivery. Using the XRD6414AB the following

final design considerations can be made.

1. Be generous with analog and digital ground planes.

Mirror the ground plane with the supply planes. Use

a 5 mil power / ground plane separation if a four layer

board can be used. The XRD6414 substrate is com-

mon to the packagesâ AGND pins only. DGND and

DVDD are separate supplies dedicated to the output

logic drivers of the XRD6414. Connect DGND and

DVDD to the power planes of the systemâs digital log-

ic.

2. Keep high frequency decoupling capacitors very

close to the A/D pins and minimize the loop area in-

cluded so less flux will induce less noise. Use de-

coupling capacitors in the same locations as on the

XRD6414AB.

3. Coupling between logic signals and analog circuitry

can easily change a 10-bit system into an 8-bit sys-

tem or worse. Completely separate them. Watch for

coupling opportunities from other sources not im-

mediately associated with the A/D. Donât use switch-

ing power supplies in adjacent locations, for exam-

ple.

4. The DC performance of the XRD6414 is optimized

with rise and fall times of CLK edges limited to great-

er than or equal to 10ns. A resistor in series with the

CLK input pin can combine with parasitic capaci-

tance to limit rise and fall times. Select a low jitter

clock with a 50% duty cycle for best spectral results.

5. Use support devices equivalent to those used on the

evaluation board. Use the application board to verify

these devices up front, i.e. use very linear passive

components in the signal path.

6. Select a driving op amp whose noise, speed, and lin-

earity fits the application. Use a resistor to decouple

the output of the driving op amp from the switching

input capacitance of the XRD6414.

7. DNL and INL performance is optimized when the

VRB input of the XRD6414 is buffered. If VRB is con-

nected to the PCB ground plane it is subject to the

noise and ground bounce in that plane. For example

VRB could be buffered to 50mV above ground and

still have a wide reference voltage range set by con-

necting VRT to a voltage near AVDD.

8. Use 50 or 100â¦ resistors to isolate the XRD6414 dig-

ital output pins from a latch or bus connection. This

protects the output drivers and reduces the effects of

high speed switching logic signals from degrading

the ADC performance. Layout the latch or digital

buffers as close to the ADC as possible to minimize

trace length.

Sourceâbody junction diode

AVDD

between DVDD

DVDD

& AVDD

A/D Circuit

DB(0-9)

& OFW

Sourceâbody junction

AGND diode between DGND

& AGND

DGND

Figure 5. XRD6414 ADC Power Supply

Circuit Allows Separate AVDD & DVDD

and Separate AGND & DGND

Rev. 1.00

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