XRP7713_10 Datasheet, PDF (6/29 Pages) Exar Corporation – Three Channel Digital PWM Step Down Controller

PIN ASSIGNMENT
XRP7713
Three Channel Digital PWM Step Down Controller
DVDD
1
GPIO1
2
GPIO2
3
GPIO3
4
GPIO4
5
GPIO5 6
ENABLE 7
DGND
8
XRP7713
TQFN
5mm x 5mm
Exposed Pad: AGND
24
BST1
23 PGND2
22
GL2
21
LX2
20
GH2
19
BST2
18
VCCD
17
BST3
Fig. 3: XRP7713 Pin Assignment
PIN DESCRIPTION
Name
VIN
VCCA
VCCD
PGND13
AVDD
DVDD
DGND
AGND
Pin Number
Description
30
29
18
28, 23,13
32
1
8
9
Power source for the internal linear regulators to generate VCCA, VDD and the Standby LDO
(LDOOUT). Place a decoupling capacitor close to the controller IC. Also used in UVLO1 fault
generation – if VIN falls below the user programmed limit, all channels are shut down. The
Output of the internal 5V LDO. This voltage is internally used to power analog blocks. This pin
should be bypassed with a minimum of 4.7uF to AGND
Gate Drive input voltage. This is not an output voltage. This pin can be connected to VCCA to
provide power for the Gate Drive. VCCD should be connected to VCCA with the shortest
possible trace and decouple with a minimum 1µF capacitor. Alternatively, VCCD could be
connected to an external supply (not greater than 5V).
Power Ground. Ground connection for the low side gate driver. Connect at low side FET source.
Output of the internal 1.8V LDO. This pin should be bypassed with a minimum of 2.2uF to
DGND
Input for powering the internal digital logic. This pin should be connected to AVDD.
Digital Ground. Connect this pin to the ground plane at the exposed pad with a separate trace.
Analog Ground. Connect this pin to the ground plane at the exposed pad with a separate trace
© 2010 Exar Corporation
6/29
Rev. 1.1.1