XR16V2551 Datasheet, PDF (6/51 Pages) Exar Corporation – HIGH PERFORMANCE DUART WITH 16-BYTE FIFO AND POWERSAVE FEATURE

XR16V2551
PRELIMINARY
HIGH PERFORMANCE DUART WITH 16-BYTE FIFO AND POWERSAVE FEATURE
Pin Description
REV. P1.0.0
NAME
32-QFN 48-TQFP
TYPE
PIN # PIN #
DESCRIPTION
16/68#
17
24
I Intel or Motorola Bus Select.
When 16/68# pin is HIGH, 16 or Intel Mode, the device will operate in the Intel bus
type of interface.
When 16/68# pin is LOW, 68 or Motorola mode, the device will operate in the
Motorola bus type of interface.
CLKSEL
-
25
I Baud-Rate-Generator Input Clock Prescaler Select for channel A and B. This input
is only sampled during power up or a reset. Connect to VCC for divide by 1 and
GND for divide by 4. MCR[7] can override the state of this pin following a reset or
initialization. See MCR bit-7 and Figure 5 in the Baud Rate Generator section.
RESET 24
(RESET#)
VCC
26
GND
13
NC
-
36
I When 16/68# pin is HIGH for Intel bus interface, this input becomes RESET (active
high). When 16/68# pin is LOW for Motorola bus interface, this input becomes
RESET# (active low).
A 40 ns minimum active pulse on this pin will reset the internal registers and all out-
puts of channel A and B. The UART transmitter output will be held HIGH, the
receiver input will be ignored and outputs are reset during reset period (see
Table 16).
42 Pwr _{2.25V to 3.6V power supply. All input pins are 5V tolerant.}
17 Pwr _{Power supply common, ground.}
37
- _{No connection.}
Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain.
6