XRT86VL38_07 Datasheet, PDF(59/183 Page) Exar Corporation – OCTAL T1/E1/J1 FRAMER/LIU COMBO

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XRT86VL38_07 Datasheet, PDF (59/183 Pages) Exar Corporation – OCTAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION

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XRT86VL38

REV. V1.2.1

OCTAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION

TABLE 32: PRBS CONTROL AND STATUS REGISTER 0 (PRBSCSR0)

HEX ADDRESS: 0XN121

BIT

FUNCTION

3 PRBS_Switch

TYPE

R/W

DEFAULT

DESCRIPTION-OPERATION

PRBS Switch

This bit enables or disables the PRBS switch function within the

XRT86VL38 device.

By enabling the PRBS switch function, PRBS functionality will be

switched between the receive and transmit framer. E1 Receive

framer will generate the PRBS pattern and insert it onto the receive

backplane interface, and E1 Transmit Framer will be monitoring the

transmit backplane interface for PRBS pattern and declare PRBS

LOCK if PRBS has locked onto the input pattern.

If PRBS switch is disabled, E1 Transmit framer will generate the

PRBS pattern to the line interface and the receive framer will be

monitoring the line for PRBS/QRTS pattern and declare PRBS

LOCK if PRBS has locked onto the input pattern.

0 = Disables the PRBS Switch Feature.

1 = Enables the PRBS Switch Feature.

2 BER[1]

1 BER[0]

R/W

Bit Error Rate

R/W

This bit is used to insert PRBS bit error at the rates presented at the

table below. The exact function of this bit depends on whether

PRBS switch function is enabled or not. (bit 3 within this register).

If the PRBS switch function is disabled, bit error will be inserted by

the E1 transmit framer out to the line interface if this bit is enabled.

If the PRBS switch function is enabled, bit error will be inserted by

the E1 receive framer out to the receive backplane interface if this

bit is enabled.

BER[1:0]

BIT ERROR RATE

Disable Bit Error insertion to the transmit output

or receive backplane interface

Bit Error is inserted to the transmit output or

receive backplane interface at a rate of 1/1000

(one out of one Thousand)

Bit Error is inserted to the transmit output or

receive backplane interface at a rate of 1/

1,000,000 (one out of one million)

Disable Bit Error insertion to the transmit output

or receive backplane interface

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