XR20M1170 Datasheet, PDF (58/60 Pages) Exar Corporation – I2C/SPI UART WITH 64-BYTE FIFO

XR20M1170
I2C/SPI UART WITH 64-BYTE FIFO
TABLE OF CONTENTS
REV. 1.0.0
GENERAL DESCRIPTION ................................................................................................ 1
APPLICATIONS............................................................................................................................................... 1
FEATURES .................................................................................................................................................... 1
FIGURE 1. XR20M1170 BLOCK DIAGRAM ........................................................................................................................................ 1
FIGURE 2. PIN OUT ASSIGNMENT ..................................................................................................................................................... 2
ORDERING INFORMATION................................................................................................................................ 3
PIN DESCRIPTIONS ........................................................................................................ 3
1.0 PRODUCT DESCRIPTION....................................................................................................................... 6
2.0 FUNCTIONAL DESCRIPTIONS............................................................................................................... 7
2.1 CPU INTERFACE................................................................................................................................................. 7
2.1.1 I2C-BUS INTERFACE ..................................................................................................................................................... 7
FIGURE 3. I2C START AND STOP CONDITIONS ................................................................................................................................. 7
FIGURE 4. MASTER WRITES TO SLAVE (M1170)............................................................................................................................... 7
FIGURE 5. MASTER READS FROM SLAVE (M1170) ........................................................................................................................... 7
FIGURE 6. I2C DATA FORMATS ........................................................................................................................................................ 8
2.1.1.1 I2C-BUS ADDRESSING ............................................................................................................................................ 9
TABLE 1: XR20M1170 I2C ADDRESS MAP ...................................................................................................................................... 9
TABLE 2: I2C SUB-ADDRESS (REGISTER ADDRESS) .......................................................................................................................... 9
2.1.2 SPI BUS INTERFACE ................................................................................................................................................... 10
TABLE 3: SPI FIRST BYTE FORMAT ................................................................................................................................................ 10
FIGURE 7. SPI WRITE.................................................................................................................................................................... 10
FIGURE 8. SPI READ ..................................................................................................................................................................... 10
FIGURE 9. SPI FIFO WRITE........................................................................................................................................................... 10
2.2 DEVICE RESET ................................................................................................................................................. 11
2.3 INTERNAL REGISTERS.................................................................................................................................... 11
2.4 IRQ# OUTPUT ................................................................................................................................................... 11
TABLE 4: IRQ# PIN OPERATION FOR TRANSMITTER ........................................................................................................................ 11
TABLE 5: IRQ# PIN OPERATION FOR RECEIVER ............................................................................................................................. 11
FIGURE 10. SPI FIFO READ .......................................................................................................................................................... 11
2.5 CRYSTAL OSCILLATOR OR EXTERNAL CLOCK INPUT .............................................................................. 12
FIGURE 11. TYPICAL OSCILLATOR CONNECTIONS............................................................................................................................. 12
2.6 PROGRAMMABLE BAUD RATE GENERATOR WITH FRACTIONAL DIVISOR............................................ 12
FIGURE 12. BAUD RATE GENERATOR ............................................................................................................................................. 13
TABLE 6: TYPICAL DATA RATES WITH A 24 MHZ CRYSTAL OR EXTERNAL CLOCK AT 16X SAMPLING ................................................... 14
2.7 TRANSMITTER .................................................................................................................................................. 14
2.7.1 TRANSMIT HOLDING REGISTER (THR) - WRITE ONLY ........................................................................................... 15
2.7.2 TRANSMITTER OPERATION IN NON-FIFO MODE .................................................................................................... 15
FIGURE 13. TRANSMITTER OPERATION IN NON-FIFO MODE ............................................................................................................ 15
2.7.3 TRANSMITTER OPERATION IN FIFO MODE ............................................................................................................. 15
FIGURE 14. TRANSMITTER OPERATION IN FIFO AND FLOW CONTROL MODE ................................................................................... 15
2.8 RECEIVER ......................................................................................................................................................... 16
2.8.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY .............................................................................................. 16
FIGURE 15. RECEIVER OPERATION IN NON-FIFO MODE .................................................................................................................. 16
FIGURE 16. RECEIVER OPERATION IN FIFO AND AUTO RTS FLOW CONTROL MODE ....................................................................... 17
2.9 AUTO RTS (HARDWARE) FLOW CONTROL .................................................................................................. 17
2.10 AUTO RTS HALT AND RESUME................................................................................................................... 17
2.11 AUTO CTS FLOW CONTROL ........................................................................................................................ 17
FIGURE 17. AUTO RTS AND CTS FLOW CONTROL OPERATION....................................................................................................... 18
2.12 AUTO XON/XOFF (SOFTWARE) FLOW CONTROL...................................................................................... 19
2.13 SPECIAL CHARACTER DETECT .................................................................................................................. 19
2.14 AUTO RS485 HALF-DUPLEX CONTROL ..................................................................................................... 19
2.14.1 NORMAL MULTIDROP MODE ................................................................................................................................... 19
2.14.2 AUTO ADDRESS DETECTION .................................................................................................................................. 20
2.15 INFRARED MODE ........................................................................................................................................... 21
FIGURE 18. INFRARED TRANSMIT DATA ENCODING AND RECEIVE DATA DECODING .......................................................................... 21
2.16 SLEEP MODE WITH AUTO WAKE-UP.......................................................................................................... 22
2.17 INTERNAL LOOPBACK ................................................................................................................................. 23
FIGURE 19. INTERNAL LOOP BACK ................................................................................................................................................. 23
3.0 UART INTERNAL REGISTERS ............................................................................................................. 24
TABLE 7: UART INTERNAL REGISTER ADDRESSES .............................................................................................................. 24
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