XR16M780 Datasheet, PDF (58/58 Pages) Exar Corporation – 1.62V TO 3.63V HIGH PERFORMANCE UART WITH 64-BYTE FIFO

XR16M780
1.62V TO 3.63V HIGH PERFORMANCE UART WITH 64-BYTE FIFO
REV. 1.0.0
4.3.2 IER VERSUS RECEIVE/TRANSMIT FIFO POLLED MODE OPERATION .................................................................. 28
4.4 INTERRUPT STATUS REGISTER (ISR) - READ-ONLY .................................................................................. 29
4.4.1 INTERRUPT GENERATION: ........................................................................................................................................ 29
4.4.2 INTERRUPT CLEARING: ............................................................................................................................................. 30
TABLE 8: INTERRUPT SOURCE AND PRIORITY LEVEL ....................................................................................................................... 30
4.5 FIFO CONTROL REGISTER (FCR) - WRITE-ONLY......................................................................................... 31
TABLE 9: TRANSMIT AND RECEIVE FIFO TRIGGER TABLE AND LEVEL SELECTION ............................................................................ 32
4.6 LINE CONTROL REGISTER (LCR) - READ/WRITE......................................................................................... 32
TABLE 10: PARITY SELECTION ........................................................................................................................................................ 33
4.7 MODEM CONTROL REGISTER (MCR) OR GENERAL PURPOSE OUTPUTS CONTROL - READ/WRITE.. 34
TABLE 11: INT OUTPUT MODES ..................................................................................................................................................... 34
4.8 LINE STATUS REGISTER (LSR) - READ ONLY.............................................................................................. 35
4.9 MODEM STATUS REGISTER (MSR) - READ ONLY ....................................................................................... 36
4.10 MODEM STATUS REGISTER (MSR) - WRITE ONLY .................................................................................... 37
4.11 SCRATCH PAD REGISTER (SPR) - READ/WRITE ....................................................................................... 37
4.12 ENHANCED MODE SELECT REGISTER (EMSR) - WRITE-ONLY ............................................................... 38
TABLE 12: SCRATCHPAD SWAP SELECTION .................................................................................................................................... 38
TABLE 13: AUTO RTS HYSTERESIS ................................................................................................................................................ 39
4.13 BAUD RATE GENERATOR REGISTERS (DLL, DLM AND DLD) - READ/WRITE ....................................... 39
TABLE 14: SAMPLING RATE SELECT ............................................................................................................................................... 40
TABLE 15: BRG SELECT ................................................................................................................................................................ 40
4.14 TRIGGER LEVEL REGISTER (TRG) - WRITE-ONLY .................................................................................... 40
4.15 RX/TX FIFO LEVEL COUNT REGISTER (FC) - READ-ONLY ....................................................................... 40
4.16 FEATURE CONTROL REGISTER (FCTR) - READ/WRITE............................................................................ 41
TABLE 16: TRIGGER TABLE SELECT ................................................................................................................................................ 41
4.17 ENHANCED FEATURE REGISTER (EFR) - READ/WRITE ........................................................................... 41
TABLE 17: SOFTWARE FLOW CONTROL FUNCTIONS ........................................................................................................................ 42
4.18 SOFTWARE FLOW CONTROL REGISTERS (XOFF1, XOFF2, XON1, XON2) - READ/WRITE................... 43
TABLE 18: UART RESET CONDITIONS ...................................................................................................................................... 44
ABSOLUTE MAXIMUM RATINGS.................................................................................. 45
TYPICAL PACKAGE THERMAL RESISTANCE DATA (MARGIN OF ERROR: ± 15%) 45
ELECTRICAL CHARACTERISTICS ............................................................................... 45
DC ELECTRICAL CHARACTERISTICS ............................................................................................................. 45
AC ELECTRICAL CHARACTERISTICS ............................................................................................................. 46
TA = -40O TO +85OC, VCC IS 1.62 TO 3.6V, 70 PF LOAD WHERE APPLICABLE ............................................. 46
FIGURE 16. CLOCK TIMING............................................................................................................................................................. 47
FIGURE 17. MODEM INPUT/OUTPUT TIMING .................................................................................................................................... 48
FIGURE 18. 16 MODE (INTEL) DATA BUS READ TIMING ................................................................................................................... 48
FIGURE 19. 16 MODE (INTEL) DATA BUS WRITE TIMING.................................................................................................................. 49
FIGURE 20. 68 MODE (MOTOROLA) DATA BUS READ TIMING .......................................................................................................... 49
FIGURE 22. RECEIVE READY & INTERRUPT TIMING [NON-FIFO MODE] ............................................................................................ 50
FIGURE 21. 68 MODE (MOTOROLA) DATA BUS WRITE TIMING......................................................................................................... 50
FIGURE 23. TRANSMIT READY & INTERRUPT TIMING [NON-FIFO MODE] .......................................................................................... 51
FIGURE 24. RECEIVE READY & INTERRUPT TIMING [FIFO MODE] .................................................................................................... 51
FIGURE 25. TRANSMIT READY & INTERRUPT TIMING [FIFO MODE] .................................................................................................. 52
PACKAGE DIMENSIONS (32 PIN QFN - 5 X 5 X 0.9 mm) .............................................. 53
PACKAGE DIMENSIONS (48 PIN TQFP - 7 X 7 X 1 mm) ............................................... 54
PACKAGE DIMENSIONS (25 PIN BGA - 3 X 3 X 0.8 mm).............................................. 55
REVISION HISTORY...................................................................................................................................... 56
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