XR-2211A Datasheet, PDF (5/24 Pages) Exar Corporation – FSK Demodulator/ Tone Decoder

XR-2211A
DC ELECTRICAL CHARACTERISTICS (Cont.)
Test Conditions: V_CC = 12V, T_A = +25°C, R_O = 30KW, C_O = 0.033mF, unless otherwise specified.
Parameter
Voltage Comparator Section
Input Impedance
Input Bias Current
Voltage Gain
Output Voltage Low
Output Leakage Current
Internal Reference
Voltage Level
Output Impedance
Maximum Source Current
Min.
Typ.
2
100
55
70
300
0.01
4.75
5.3
100
80
Max.
500
10
5.85
Unit Conditions
MW Measured at pins 3 and 8
nA
dB
R_L = 5.1KW
mV
I_C = 3mA
mA
V_O = 20V
V
Measured at pin 10
W
AC Small Signal
mA
Note:
- These parameters, although guaranteed over the recommended operating conditions, are not 100% tested in production.
- Bold face parameters are covered by production test.
Specifications are subject to change without notice
ABSOLUTE MAXIMUM RATINGS
Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V
Input Signal Level . . . . . . . . . . . . . . . . . . . . . . . . 3V rms
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . 900mW
Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . 800mW
Derate Above T_A = +25°C . . . . . . . . 6mW/°C
JEDEC SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . 390mW
Derate Above T_A = +25°C . . . . . . . . . 5mW/°C
SYSTEM DESCRIPTION
The main PLL within the XR-2211A is constructed from an
input preamplifier, analog multiplier used as a phase
detector and a precision voltage controlled oscillator
(VCO). The preamplifier is used as a limiter such that
input signals above typically 10mV RMS are amplified to a
constant high level signal. The multiplying-type phase
detector acts as a digital exclusive or gate. Its output
(unfiltered) produces sum and difference frequencies of
the input and the VCO output. The VCO is actually a
current controlled oscillator with its normal input current
(f_O) set by a resistor (R₀) to ground and its driving current
with a resistor (R₁) from the phase detector.
The output of the phase detector produces sum and
difference of the input and the VCO frequencies
(internally connected). When in lock, these frequencies
are f_IN+ f_VCO (2 times f_IN when in lock) and f_IN - f_VCO (0Hz
when lock). By adding a capacitor to the phase detector
output, the 2 times f_IN component is reduced, leaving a
DC voltage that represents the phase difference between
the two frequencies. This closes the loop and allows the
VCO to track the input frequency.
The FSK comparator is used to determine if the VCO is
driven above or below the center frequency (FSK
comparator). This will produce both active high and
active low outputs to indicate when the main PLL is in lock
(quadrature phase detector and lock detector
comparator).
Rev. 1.01
5