DAN-176 Datasheet, PDF (4/5 Pages) Exar Corporation – POWER-SAVE FEATURE: SLEEP CURRENT DOWN

DATA COMMUNICATIONS APPLICATION NOTE
DAN176
6.0 PROGRAMMING THE UART TO ENTER POWER-SAVE MODE
The following pseudo-code snippets list the steps that are required to place the Low Power UART in sleep
mode and Power-Save mode:
The function Enter_Sleep_mode (channel) places the ‘channel’ in sleep mode. In the two channel XR16L2551/
2751 devices, this function must be called twice, once per channel.
Enter_Sleep_Mode (channel) {
unsigned char lcr = read (LCR);
write (LCR, 0xBF);
write (EFR, read(EFR) | 0x10);
write (LCR, lcr);
write (IER, read(IER) | 0x10);
}
// store the value of the LCR register
// To access the enhanced set of registers
// Enable the special function bits (in this case, IER bit-4)
// restore the old value of LCR
// this places the device in sleep mode if Condiiton C in
// Figure 2 is satisfied.
The function Toggle_Power_Save (state) toggles the PwrSave pin of the Low Power UART HIGH or LOW
through the I/O pin of the CPU/FPGA, depending on the value of the parameter ‘state’.
Toggle_Power_Save (state) {
if (state) Set PwrSave;
else Reset PwrSave;
}
/* state = 1 or 0 */
// Toggle PwrSave pin HIGH via the I/O pin of the CPU/FPGA
// Toggle PwrSave pin LOW via the I/O pin of the CPU/FPGA
Finally, the function Enter_Power_Save_Mode () calls these two functions and places the Low Power UART in
Power-Save mode.
Enter_Power_Save_Mode () {
Enter_Sleep_Mode (1);
Enter_Sleep_Mode (2);
Toggle_Power_Save (1);
}
// this places channel 1 in sleep mode
// this places channel 2 in sleep mode -> skip this line for the
// single channel XR16L580
// Set Power-Save pin = HIGH
The following pseudo-code shows a typical initialization routine and places the Low Power UART in the Power-
Save mode at the end of this routine.
/** Initialization Routine **/
write (LCR, 0x80);
write (DLL, 0x01);
write (DLM, 0x00);
write (LCR, 0xBF);
write (EFR, 0xD0);
write (LCR, 0x03);
write (FCR, 0x07);
write (MCR, 0x02);
Enter_Power_Save_Mode ();
// Access Baud Rate registers DLL & DLM
// user-desired: here the highest baud rate is chosen
// Access the Enhanced Set of Registers such as EFR etc
// Enable AutoRTS, AutoCTS and enhanced functions control
// Select Line parameters - word length-8, no parity and 1 stop bit
// This also provides access to the general set of registers like
// FCR, IER etc.
// Enable and reset the RX and TX FIFO’s
// Assert the RTS# output once - required when using AutoRTS
// Place the device in Power-Save mode
In case the event that wakes up the Low Power UART does not take place, the CPU/FPGA can claim control of
the situation by getting the device out of Power-Save mode:
Toggle_Power_Save (0);
// Exit Power-Save mode. Now the internal registers of the
// Low Power UART can be accessed.
4