XRT86SH221_08 Datasheet, PDF (333/357 Pages) Exar Corporation – SDH-TO-PDH FRAMER/MAPPER WITH INTEGRATED 21-CHANNEL E1 SH LIU

REV. 1.0.1
XRT86SH221
SDH-TO-PDH FRAMER/MAPPER WITH INTEGRATED 21-CHANNEL E1 SH LIU
Table 291 Timing Information for the Transmit STM-0/STM-1 Telecom Bus Interface - STM-1 Slot Slave
Applications
Symbol
t54
Description
Falling edge of TxA_CLK to updates in TxA_D[7:0], TxA_PL,
TxA_C1J1V1_FP and TxA_DP
Min.
1.1ns
Typ.
Max.
2.5ns
t57
TxSBFP Set-up time to rising edge of Tx51_19MHz
6ns
t58
Rising edge of Tx51_19MHz to TxSBFP_IN_OUT Hold Time
1ns
Note: In Slave mode, TxSBFP_IN_OUT is input to XRT86SH221. Inputs are applied using input clock Tx_51_19MHz and
are sampled on rising edge of Tx_51_19MHz internally. The t57 parameter is referenced to the rising edge of
Tx_51_19MHz, which provides the minimum setup and hold time required for TxSBFP_IN_OUT. TxA_CLK should be
used to sampe the output signals not the input signals.
8.5 The Receive STM-0/STM-1 Telecom Bus Interface Timing - STM-0 Applications
Whenever the Receive STM-0/STM-1 Telecom Bus Interface has been configured to operate in the STM-0
Mode, then all of the signals (which are accepted via this Bus Interface) are sampled upon the rising edge of
RxD_CLK (6.48MHz clock signal).
FIGURE 68. AN ILLUSTRATION OF THE WAVEFORMS OF THE SIGNALS THAT ARE INPUT VIA THE RECEIVE STM-0/
STM-1 TELECOM BUS INTERFACE
t59
RxD_CLK
RxD_PL
RxD_C1J1V1_FP
RxD_D[7:0]
A2 C1
C1
J1 Data Data
t60
Note: The value for t59 and t60 can be found in Table 292. The data and control signals are applied on the falling edge of
RxD_CLK. The XRT86SH221 samples the data and control signals on the rising edge of RxD_CLK.
Table 292 Timing Information for the Receive STM-0/STM-1 Telecom Bus Interface - STM-0
Applications
Symbol
Description
Min.
Typ.
t59
RxD_D[7:0], RxD_PL, RxD_C1J1V1_FP, RxD_ALARM and
6 ns
RxD_DP to rising edge of RxD_CLK set-up time requirements
Max.
324