XRT86SH221_08 Datasheet, PDF (219/357 Pages) Exar Corporation – SDH-TO-PDH FRAMER/MAPPER WITH INTEGRATED 21-CHANNEL E1 SH LIU

REV. 1.0.1
XRT86SH221
SDH-TO-PDH FRAMER/MAPPER WITH INTEGRATED 21-CHANNEL E1 SH LIU
BIT 7
R/W
0
TABLE 184: TRANSMIT STM-0 PATH Z3 BYTE VALUE REGISTER (TPZ3VR 0X07AB)
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
Transmit Z3 Byte Value[7:0]
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
BIT 0
R/W
0
BIT [7:0] - Transmit Z3 Byte Value
These READ/WRITE bit-fields are used to have software control over the value of the Z3 byte, within each outbound
VC-3. If the user configures the Transmit STM-0 POH Processor Block to this register as the source of the Z3 byte, then
it will automatically write the contents of this register into the Z3 byte location, within each outbound VC-3.
This feature is enabled whenever the user writes a 0 into BIT 1 (Z3 Insertion Type) within the Transmit STM-0 Path -
SONET Control Register - Byte 0 register (Address Location= 0x0782).
BIT 7
R/W
0
TABLE 185: TRANSMIT STM-0 PATH Z4 BYTE VALUE REGISTER (TPZ4VR 0XN9AF)
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
Transmit Z4 Byte Value[7:0]
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
BIT 0
R/W
0
BIT [7:0] - Transmit Z4 Byte Value
These READ/WRITE bit-fields are used to have software control over the value of the Z4 byte, within each outbound
VC-3.
If the user configures the Transmit STM-0 POH Processor Block to this register as the source of the Z4 byte, then it will
automatically write the contents of this register into the Z4 byte location, within each outbound VC-3.
This feature is enabled whenever the user writes a 0 into BIT 2 (Z4 Insertion Type) within the Transmit STM-0 Path -
SONET Control Register - Byte 0 register (Address Location= 0x0782).
BIT 7
R/W
0
TABLE 186: TRANSMIT STM-0 PATH Z5 BYTE VALUE REGISTER (TPZ5VR 0X07B3)
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
Transmit Z5 Byte Value[7:0]
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
BIT 0
R/W
0
BIT [7:0] - Transmit Z5 Byte Value
These READ/WRITE bit-fields are used to have software control over the value of the Z5 byte, within each outbound
VC-3.
If the user configures the Transmit STM-0 POH Processor Block to this register as the source of the Z5 byte, then it will
automatically write the contents of this register into the Z5 byte location, within each outbound VC-3.
This feature is enabled whenever the user writes a 0 into BIT 3 (Z5 Insertion Type) within the Transmit STM-0 Path -
SONET Control Register - Byte 0 register (Address Location= 0x0782).
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