XRT86VL32_07 Datasheet, PDF (33/174 Pages) Exar Corporation – DUAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION

XRT86VL32
REV. V1.2.0
DUAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
TABLE 9: RECEIVE SIGNALING & DATA LINK SELECT REGISTER (RSDLSR)
HEX ADDRESS: 0Xn10C
BIT
FUNCTION TYPE DEFAULT
DESCRIPTION-OPERATION
2-0 RxSIGDL[2:0] R/W
000 Receive Signaling and Datalink Select[2:0]:
These bits specify the destination for the data that is to be extracted via D/E
channel, National Bits in timeslot 0 of the non-FAS frames, and Timeslot 16 in
the outbound frames. The table below presents the settings of these three
RxSIGDL bits in detail.
RXSIGDL
[2:0]
D/E CHANNEL
NATIONAL BITS
TIME SLOT 16
000 RxFrTD_n or the Data Link
RxSer_n
output pin
RxSER_n output pin
001 RxFrTD_n or the Data Link
RxSer_n
output pin
CAS signaling is enabled. Time
Slot 16 can be extracted to any
of the following:
• RxSer_n output pin
• RSAR Register
(0xn500-0xn51F)
• RxOH_n output pin on time
slot 16 only
• RxSIG_n output pin on every
time slot
010 RxFrTD_n or the Data Link
Time Slot 16 can be extracted
RxSer_n
output pin
forced to All
Ones
to any of the following:
• RxSer_n output pin
• RSAR Register
(0xn500-0xn51F)
• RxOH_n output pin on time
slot 16 only
• RxSIG_n output pin on time
slot 16 only
011 RxFrTD_n or the Data Link
CAS signaling is enabled. Time
RxSer_n
output pin
forced to All Slot 16 can be extracted to any
Ones
of the following:
• RxSer_n output pin
• RSAR Register
(0xn500-0xn51F)
• RxOH_n output pin on time
slot 16 only
RxSIG_n output pin on every
time slot
100 RxSIG_n or the Data Link
RxSer_n
output pin
RxSER_n output pin
101/110/ Not Used
111
Not Used
Not Used
28