XR16M680 Datasheet, PDF (32/57 Pages) Exar Corporation – 1.62V TO 3.63V HIGH PERFORMANCE UART WITH 32-BYTE FIFO

XR16M680
1.62V TO 3.63V HIGH PERFORMANCE UART WITH 32-BYTE FIFO
REV. 1.0.0
TABLE 9: TRANSMIT AND RECEIVE FIFO TRIGGER TABLE AND LEVEL SELECTION
FCR BIT-7 FCR BIT-6 FCR BIT-5 FCR BIT-4
RECEIVE TRIGGER
LEVEL
TRANSMIT TRIGGER
LEVEL
COMPATIBILITY
0
0
0
1
1
0
1
1
0
0
8
0
1
16
1
0
24
1
1
28
16
16C650A, 16V2650 &
8
16M2650
24
30
4.6 Line Control Register (LCR) - Read/Write
The Line Control Register is used to specify the asynchronous data communication format. The word or
character length, the number of stop bits, and the parity are selected by writing the appropriate bits in this
register.
LCR[1:0]: TX and RX Word Length Select
These two bits specify the word length to be transmitted or received.
BIT-1
0
0
1
1
BIT-0
0
1
0
1
WORD LENGTH
5 (default)
6
7
8
32