XR-215A Datasheet, PDF (24/32 Pages) Exar Corporation – Monolithic Phase Locked Loop

XR-215A
+5V
0V
Keying
Input
5K
0.1mF
+12V
5K
0.1mF
U1
5
6 ^Phase
Comp.
11
16 V_CC
4
XR-215A
12 _VCO
15
10
V_EE
Op
Amp
8
5K
9 13
14 2 3 1 7
R_x
C₀
10K
10K
0.1mF
3K
FSK Output
(Low Level)
2.5V_PP
F1 F2
FSK Output
10V_PP
F1 F2
Figure 22. Circuit Connection For FSK Generation
Frequency Synthesis
In frequency synthesis applications, a programmable counter or divide-by-N circuit is connected between the VCO
output (pin 15) and one of the phase detector inputs (pins 4 or 6), as shown in Figure 23. The principle of operation of the
circuit can be briefly explained as follows: The counter divides down the oscillator frequency by the programmable
divider modulus, N. Thus, when the entire system is phase-locked to an input signal at frequency, f_s, the oscillator output
at pin 15 is at a frequency (Nf_s), where N is the divider modulus. By proper choice of the divider modulus, a large number
of discrete frequencies can be synthesized from a given reference frequency. The low-pass filter capacitor C₁ is
normally chosen to provide a cut-off frequency equal to 0.1% to 2% of the signal frequency, f_s.
Rev. 1.01
24