XRT94L43_06 Datasheet, PDF (234/328 Pages) Exar Corporation – SONET/SDH OC-12 TO 12XDS3/E3 MAPPER

XRT94L43
REV. 1.0.2
SONET/SDH OC-12 TO 12XDS3/E3 MAPPER
STS-3/STM-1 TELECOM BUS INTERFACE - RECEIVE DIRECTION
PIN #
SIGNAL NAME
SIGNAL
I/O
TYPE
DESCRIPTION
V23 STS3RxD_PL_2
TAOS_2
O CMOS STS-3/STM-1 Receive (Drop) Telecom Bus - Payload Indi-
cator Output Signal - Channel 2/TAOS_2 (General Purpose)
output Pin - Channel 2:
The function of this output pin depends upon whether or not
theSTS-3/STM-1 Telecom Bus Interface block associated with
Channel 2 has been enabled or disabled.
If the STS-3/STM-1 Telecom Bus Interface (associated with
Channel 2) is enabled - STS-3/STS-1 Receive (Drop) Tele-
com Bus - Payload Indicator Output - STS3RxD_PL_2:
This output pin indicates whether or not Transport Overhead
bytes are being output via the STS3RXD_D_2[7:0] output pins.
This output pin is pulled "Low" for the duration that the STS-3/
STM-1 Receive Telecom Bus is transmitting a Transport Over-
head byte via the STS3RXD_D_2[7:0] output pins.
Conversely, this output pin is pulled "High" for the duration that
the STS-3/STM-1 Receive Telecom Bus is transmitting some-
thing other than a Transport Overhead byte via the
STS3RXD_D_2[7:0] output pins.
If the STS-3/STM-1 Telecom Bus Interface (associated with
Channel 2) is disabled - TAOS_2 (General Purpose) output
Pin - Channel 2:
This output pin can be used as a general purpose output pin.
The state of this output pin can be controlled by writing the
appropriate value into Bit 4 (TAOS) within the Line Interface
Drive Register associated with Channel 2 (Indirect Address =
0x3E, 0x80), (Direct Address = 0x3F80).
NOTE: For Product Legacy purposes, this pin is called TAOS_2
because one possible application is to tie this output
pin to an TAOS (Transmit All Ones) input pin from one
of Exar's XRT73L0X/XRT75L0X DS3/E3/STS-1 LIU
devices. However, this output pin, and the
corresponding register bit can be used for any
purpose.
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