XR28V382 Datasheet, PDF (23/39 Pages) Exar Corporation – 3.3V DUAL LPC UART WITH 128-BYTE FIFO

XR28V382
REV. 1.0.1
3.3V DUAL LPC UART WITH 128-BYTE FIFO
Bit [2]: IR mode TX Delay
x Logic 0 = TX transmits data immedately when changing from RX to TX (default).
x Logic 1 = TX delays 4 character time when changing from RX to TX.
Bit [3]: IR mode RX Delay
x Logic 0 = RX is enabled immediately after TX is idle (default).
x Logic 1 = RX is disabled for 4 character time after TX is idle.
Bit [4]: Enable/Disable Auto RS-485 Half-Duplex Control mode
x Logic 0 = Disable the Auto RS-485 Half-Duplex Control mode (default). The RTS#/RS485 pin can be
controlled by MCR bit-1.
x Logic 1 = Enable the Auto RS-485 Half-Duplex Control mode. The RTS#/RS485 signal polarity is determined
by the bit-5.
Bit [5]: Invert the RTS#/RS485 signal polarity for RS-485 Half-Duplex Control mode
x Logic 0 = RTS#/RS485 signal polarity is HIGH for transmission and LOW for reception (default).
x Logic 1 = RTS#/RS485 signal polarity is inverted (that is, LOW for transmission and HIGH for reception).
Bit [6]: Auto Address Detection
x Logic 0 = All bytes received will be loaded into RX FIFO. See ’Section 1.4.4, Auto RS-485 Half-Duplex
Control’.
x Logic 1 = All bytes received after address byte that matches the given address or broadcast address
(determined by the 9-bit mode slave address register and 9-bit mode slave address mask register) will be
loaded into RX FIFO. See ’Section 1.4.5.1, Auto Address Detection’.
Bit [7]: Enable/Disable the 9-bit Mode
x Logic 0 = Disable the 9-bit mode (default).
x Logic 1 = Enable the 9-bit mode (multi-drop mode).
In the 9-bit mode, the parity bit becomes the address/data bit.See ’Section 1.4.5, Normal Multidrop (9-bit)
Mode’.
2.1.2.1.5
Infrared Mode Control Register - Read/Write
The V382 supports IR mode for UART channel A only. It controls infrared mode by setting this register. See
’Section 1.4.6, Infrared Mode’.
Bit [0]: IR mode IRRXA# invert
x Logic 0 = IRRA# idles LOW. (Default)
x Logic 1 = Invert the IRRXA# for IR mode, idle at HIGH.
Bit [1]: IR mode IRTXA# invert
x Logic 0 = IRTXA# idles LOW. (Default)
x Logic 1 = Invert the IRTXA# for IR mode, idle at HIGH.
Bit [2]: IR mode Half-Duplex
x Logic 0 = Enable full duplex function for IR mode.
x Logic 1 = Enable half duplex function for IR mode (default).
23